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shubhraamdbebarino
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clocking-wizard: Add support for versal clocking wizard
Add support for Clocking Wizard for Versal adaptive compute acceleration platforms. The Versal clocking wizard differs in the programming model and the register layout. The CLKFBOUT_1 registers are at offset of 0x200 instead of the 0x330 in Versal. In Versal clocking wizard the low and high time is programmed instead of the divisor. Signed-off-by: Shubhrajyoti Datta <[email protected]> Link: https://lore.kernel.org/r/[email protected] [[email protected]: Stop initializing spinlock flags] Signed-off-by: Stephen Boyd <[email protected]>
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