Skip to content

Commit 3ac5fa3

Browse files
committed
Merge tag 'drm-intel-next-2023-10-19' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
- Add new DG2 PCI IDs (Shekhar) - Remove watchdog timers for PSR on Lunar Lake (Mika Kahola) - DSB changes for proper handling of LUT programming (Ville) - Store DSC DPCD capabilities in the connector (Imre) - Clean up zero initializers (Ville) - Remove Meteor Lake force_probe protection (RK) Signed-off-by: Dave Airlie <[email protected]> From: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2 parents 2744275 + 213c436 commit 3ac5fa3

19 files changed

+235
-153
lines changed

drivers/gpu/drm/i915/display/intel_acpi.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -153,7 +153,7 @@ static acpi_handle intel_dsm_pci_probe(struct pci_dev *pdev)
153153
static bool intel_dsm_detect(void)
154154
{
155155
acpi_handle dhandle = NULL;
156-
char acpi_method_name[255] = { 0 };
156+
char acpi_method_name[255] = {};
157157
struct acpi_buffer buffer = {sizeof(acpi_method_name), acpi_method_name};
158158
struct pci_dev *pdev = NULL;
159159
int vga_count = 0;

drivers/gpu/drm/i915/display/intel_color.c

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1895,9 +1895,6 @@ void intel_color_prepare_commit(struct intel_crtc_state *crtc_state)
18951895
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
18961896
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
18971897

1898-
/* FIXME DSB has issues loading LUTs, disable it for now */
1899-
return;
1900-
19011898
if (!crtc_state->hw.active ||
19021899
intel_crtc_needs_modeset(crtc_state))
19031900
return;

drivers/gpu/drm/i915/display/intel_cx0_phy.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3009,7 +3009,7 @@ void intel_c10pll_state_verify(struct intel_atomic_state *state,
30093009
struct drm_i915_private *i915 = to_i915(state->base.dev);
30103010
const struct intel_crtc_state *new_crtc_state =
30113011
intel_atomic_get_new_crtc_state(state, crtc);
3012-
struct intel_c10pll_state mpllb_hw_state = { 0 };
3012+
struct intel_c10pll_state mpllb_hw_state = {};
30133013
const struct intel_c10pll_state *mpllb_sw_state = &new_crtc_state->cx0pll_state.c10;
30143014
struct intel_encoder *encoder;
30153015
enum phy phy;

drivers/gpu/drm/i915/display/intel_display_debugfs.c

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1191,8 +1191,8 @@ DEFINE_SHOW_ATTRIBUTE(i915_lpsp_capability);
11911191

11921192
static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
11931193
{
1194-
struct drm_connector *connector = m->private;
1195-
struct drm_device *dev = connector->dev;
1194+
struct intel_connector *connector = to_intel_connector(m->private);
1195+
struct drm_i915_private *i915 = to_i915(connector->base.dev);
11961196
struct drm_crtc *crtc;
11971197
struct intel_dp *intel_dp;
11981198
struct drm_modeset_acquire_ctx ctx;
@@ -1204,7 +1204,7 @@ static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
12041204

12051205
do {
12061206
try_again = false;
1207-
ret = drm_modeset_lock(&dev->mode_config.connection_mutex,
1207+
ret = drm_modeset_lock(&i915->drm.mode_config.connection_mutex,
12081208
&ctx);
12091209
if (ret) {
12101210
if (ret == -EDEADLK && !drm_modeset_backoff(&ctx)) {
@@ -1213,8 +1213,8 @@ static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
12131213
}
12141214
break;
12151215
}
1216-
crtc = connector->state->crtc;
1217-
if (connector->status != connector_status_connected || !crtc) {
1216+
crtc = connector->base.state->crtc;
1217+
if (connector->base.status != connector_status_connected || !crtc) {
12181218
ret = -ENODEV;
12191219
break;
12201220
}
@@ -1229,24 +1229,24 @@ static int i915_dsc_fec_support_show(struct seq_file *m, void *data)
12291229
} else if (ret) {
12301230
break;
12311231
}
1232-
intel_dp = intel_attached_dp(to_intel_connector(connector));
1232+
intel_dp = intel_attached_dp(connector);
12331233
crtc_state = to_intel_crtc_state(crtc->state);
12341234
seq_printf(m, "DSC_Enabled: %s\n",
12351235
str_yes_no(crtc_state->dsc.compression_enable));
12361236
seq_printf(m, "DSC_Sink_Support: %s\n",
1237-
str_yes_no(drm_dp_sink_supports_dsc(intel_dp->dsc_dpcd)));
1237+
str_yes_no(drm_dp_sink_supports_dsc(connector->dp.dsc_dpcd)));
12381238
seq_printf(m, "DSC_Output_Format_Sink_Support: RGB: %s YCBCR420: %s YCBCR444: %s\n",
1239-
str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd,
1239+
str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
12401240
DP_DSC_RGB)),
1241-
str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd,
1241+
str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
12421242
DP_DSC_YCbCr420_Native)),
1243-
str_yes_no(drm_dp_dsc_sink_supports_format(intel_dp->dsc_dpcd,
1243+
str_yes_no(drm_dp_dsc_sink_supports_format(connector->dp.dsc_dpcd,
12441244
DP_DSC_YCbCr444)));
12451245
seq_printf(m, "Force_DSC_Enable: %s\n",
12461246
str_yes_no(intel_dp->force_dsc_en));
12471247
if (!intel_dp_is_edp(intel_dp))
12481248
seq_printf(m, "FEC_Sink_Support: %s\n",
1249-
str_yes_no(drm_dp_sink_supports_fec(intel_dp->fec_capable)));
1249+
str_yes_no(drm_dp_sink_supports_fec(connector->dp.fec_capability)));
12501250
} while (try_again);
12511251

12521252
drm_modeset_drop_locks(&ctx);

drivers/gpu/drm/i915/display/intel_display_types.h

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -620,6 +620,12 @@ struct intel_connector {
620620

621621
struct intel_dp *mst_port;
622622

623+
struct {
624+
struct drm_dp_aux *dsc_decompression_aux;
625+
u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE];
626+
u8 fec_capability;
627+
} dp;
628+
623629
/* Work struct to schedule a uevent on link train failure */
624630
struct work_struct modeset_retry_work;
625631

@@ -1719,10 +1725,8 @@ struct intel_dp {
17191725
u8 psr_dpcd[EDP_PSR_RECEIVER_CAP_SIZE];
17201726
u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
17211727
u8 edp_dpcd[EDP_DISPLAY_CTL_CAP_SIZE];
1722-
u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE];
17231728
u8 lttpr_common_caps[DP_LTTPR_COMMON_CAP_SIZE];
17241729
u8 lttpr_phy_caps[DP_MAX_LTTPR_COUNT][DP_LTTPR_PHY_CAP_SIZE];
1725-
u8 fec_capable;
17261730
u8 pcon_dsc_dpcd[DP_PCON_DSC_ENCODER_CAP_SIZE];
17271731
/* source rates */
17281732
int num_source_rates;

0 commit comments

Comments
 (0)