Skip to content

Commit 3cb09de

Browse files
anarsoulmmind
authored andcommitted
clk: rockchip: rk3568: Add PLL rate for 33.3MHz
Add PLL rate for 33.3 MHz to allow BTT HDMI5 screen to run at its native mode of 800x480 Signed-off-by: Vasily Khoruzhick <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Heiko Stuebner <[email protected]>
1 parent 646bfc5 commit 3cb09de

File tree

1 file changed

+1
-0
lines changed

1 file changed

+1
-0
lines changed

drivers/clk/rockchip/clk-rk3568.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -89,6 +89,7 @@ static struct rockchip_pll_rate_table rk3568_pll_rates[] = {
8989
RK3036_PLL_RATE(96000000, 1, 96, 6, 4, 1, 0),
9090
RK3036_PLL_RATE(78750000, 4, 315, 6, 4, 1, 0),
9191
RK3036_PLL_RATE(74250000, 2, 99, 4, 4, 1, 0),
92+
RK3036_PLL_RATE(33300000, 4, 111, 5, 4, 1, 0),
9293
{ /* sentinel */ },
9394
};
9495

0 commit comments

Comments
 (0)