@@ -348,11 +348,11 @@ static u32 sh_msiof_spi_get_dtdl_and_syncdl(struct sh_msiof_spi_priv *p)
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}
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static void sh_msiof_spi_set_pin_regs (struct sh_msiof_spi_priv * p , u32 ss ,
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- u32 cpol , u32 cpha ,
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- u32 tx_hi_z , u32 lsb_first , u32 cs_high )
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+ bool cpol , bool cpha , bool tx_hi_z ,
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+ bool lsb_first , bool cs_high )
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{
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+ bool edge ;
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u32 tmp ;
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- int edge ;
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/*
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* CPOL CPHA TSCKIZ RSCKIZ TEDG REDG
@@ -587,20 +587,20 @@ static int sh_msiof_prepare_message(struct spi_controller *ctlr,
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{
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struct sh_msiof_spi_priv * p = spi_controller_get_devdata (ctlr );
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const struct spi_device * spi = msg -> spi ;
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- u32 ss , cs_high ;
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+ bool cs_high ;
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+ u32 ss ;
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/* Configure pins before asserting CS */
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if (spi_get_csgpiod (spi , 0 )) {
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ss = ctlr -> unused_native_cs ;
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cs_high = p -> native_cs_high ;
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} else {
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ss = spi_get_chipselect (spi , 0 );
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- cs_high = !!( spi -> mode & SPI_CS_HIGH ) ;
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+ cs_high = spi -> mode & SPI_CS_HIGH ;
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}
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- sh_msiof_spi_set_pin_regs (p , ss , !!(spi -> mode & SPI_CPOL ),
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- !!(spi -> mode & SPI_CPHA ),
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- !!(spi -> mode & SPI_3WIRE ),
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- !!(spi -> mode & SPI_LSB_FIRST ), cs_high );
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+ sh_msiof_spi_set_pin_regs (p , ss , spi -> mode & SPI_CPOL ,
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+ spi -> mode & SPI_CPHA , spi -> mode & SPI_3WIRE ,
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+ spi -> mode & SPI_LSB_FIRST , cs_high );
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return 0 ;
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}
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