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x86/cpu: Replace PEBS use of 'x86_cpu_desc' use with 'x86_cpu_id'
The 'x86_cpu_desc' and 'x86_cpu_id' structures are very similar. Reduce duplicate infrastructure by moving the few users of 'x86_cpu_desc' to the much more common variant. The existing X86_MATCH_VFM_STEPS() helper matches ranges of steppings. Instead of introducing a single-stepping match function which could get confusing when paired with the range, just use the stepping min/max match helper and use min==max. Note that this makes the table more vertically compact because multiple entries like this: INTEL_CPU_DESC(INTEL_SKYLAKE_X, 4, 0x00000000), INTEL_CPU_DESC(INTEL_SKYLAKE_X, 5, 0x00000000), INTEL_CPU_DESC(INTEL_SKYLAKE_X, 6, 0x00000000), INTEL_CPU_DESC(INTEL_SKYLAKE_X, 7, 0x00000000), can be consolidated down to a single stepping range. Signed-off-by: Dave Hansen <[email protected]> Link: https://lore.kernel.org/all/20241213185131.8B610039%40davehans-spike.ostc.intel.com
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‎arch/x86/events/intel/core.c

Lines changed: 26 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -5371,42 +5371,32 @@ static __init void intel_clovertown_quirk(void)
53715371
x86_pmu.pebs_constraints = NULL;
53725372
}
53735373

5374-
static const struct x86_cpu_desc isolation_ucodes[] = {
5375-
INTEL_CPU_DESC(INTEL_HASWELL, 3, 0x0000001f),
5376-
INTEL_CPU_DESC(INTEL_HASWELL_L, 1, 0x0000001e),
5377-
INTEL_CPU_DESC(INTEL_HASWELL_G, 1, 0x00000015),
5378-
INTEL_CPU_DESC(INTEL_HASWELL_X, 2, 0x00000037),
5379-
INTEL_CPU_DESC(INTEL_HASWELL_X, 4, 0x0000000a),
5380-
INTEL_CPU_DESC(INTEL_BROADWELL, 4, 0x00000023),
5381-
INTEL_CPU_DESC(INTEL_BROADWELL_G, 1, 0x00000014),
5382-
INTEL_CPU_DESC(INTEL_BROADWELL_D, 2, 0x00000010),
5383-
INTEL_CPU_DESC(INTEL_BROADWELL_D, 3, 0x07000009),
5384-
INTEL_CPU_DESC(INTEL_BROADWELL_D, 4, 0x0f000009),
5385-
INTEL_CPU_DESC(INTEL_BROADWELL_D, 5, 0x0e000002),
5386-
INTEL_CPU_DESC(INTEL_BROADWELL_X, 1, 0x0b000014),
5387-
INTEL_CPU_DESC(INTEL_SKYLAKE_X, 3, 0x00000021),
5388-
INTEL_CPU_DESC(INTEL_SKYLAKE_X, 4, 0x00000000),
5389-
INTEL_CPU_DESC(INTEL_SKYLAKE_X, 5, 0x00000000),
5390-
INTEL_CPU_DESC(INTEL_SKYLAKE_X, 6, 0x00000000),
5391-
INTEL_CPU_DESC(INTEL_SKYLAKE_X, 7, 0x00000000),
5392-
INTEL_CPU_DESC(INTEL_SKYLAKE_X, 11, 0x00000000),
5393-
INTEL_CPU_DESC(INTEL_SKYLAKE_L, 3, 0x0000007c),
5394-
INTEL_CPU_DESC(INTEL_SKYLAKE, 3, 0x0000007c),
5395-
INTEL_CPU_DESC(INTEL_KABYLAKE, 9, 0x0000004e),
5396-
INTEL_CPU_DESC(INTEL_KABYLAKE_L, 9, 0x0000004e),
5397-
INTEL_CPU_DESC(INTEL_KABYLAKE_L, 10, 0x0000004e),
5398-
INTEL_CPU_DESC(INTEL_KABYLAKE_L, 11, 0x0000004e),
5399-
INTEL_CPU_DESC(INTEL_KABYLAKE_L, 12, 0x0000004e),
5400-
INTEL_CPU_DESC(INTEL_KABYLAKE, 10, 0x0000004e),
5401-
INTEL_CPU_DESC(INTEL_KABYLAKE, 11, 0x0000004e),
5402-
INTEL_CPU_DESC(INTEL_KABYLAKE, 12, 0x0000004e),
5403-
INTEL_CPU_DESC(INTEL_KABYLAKE, 13, 0x0000004e),
5374+
static const struct x86_cpu_id isolation_ucodes[] = {
5375+
X86_MATCH_VFM_STEPS(INTEL_HASWELL, 3, 3, 0x0000001f),
5376+
X86_MATCH_VFM_STEPS(INTEL_HASWELL_L, 1, 1, 0x0000001e),
5377+
X86_MATCH_VFM_STEPS(INTEL_HASWELL_G, 1, 1, 0x00000015),
5378+
X86_MATCH_VFM_STEPS(INTEL_HASWELL_X, 2, 2, 0x00000037),
5379+
X86_MATCH_VFM_STEPS(INTEL_HASWELL_X, 4, 4, 0x0000000a),
5380+
X86_MATCH_VFM_STEPS(INTEL_BROADWELL, 4, 4, 0x00000023),
5381+
X86_MATCH_VFM_STEPS(INTEL_BROADWELL_G, 1, 1, 0x00000014),
5382+
X86_MATCH_VFM_STEPS(INTEL_BROADWELL_D, 2, 2, 0x00000010),
5383+
X86_MATCH_VFM_STEPS(INTEL_BROADWELL_D, 3, 3, 0x07000009),
5384+
X86_MATCH_VFM_STEPS(INTEL_BROADWELL_D, 4, 4, 0x0f000009),
5385+
X86_MATCH_VFM_STEPS(INTEL_BROADWELL_D, 5, 5, 0x0e000002),
5386+
X86_MATCH_VFM_STEPS(INTEL_BROADWELL_X, 1, 1, 0x0b000014),
5387+
X86_MATCH_VFM_STEPS(INTEL_SKYLAKE_X, 3, 3, 0x00000021),
5388+
X86_MATCH_VFM_STEPS(INTEL_SKYLAKE_X, 4, 7, 0x00000000),
5389+
X86_MATCH_VFM_STEPS(INTEL_SKYLAKE_X, 11, 11, 0x00000000),
5390+
X86_MATCH_VFM_STEPS(INTEL_SKYLAKE_L, 3, 3, 0x0000007c),
5391+
X86_MATCH_VFM_STEPS(INTEL_SKYLAKE, 3, 3, 0x0000007c),
5392+
X86_MATCH_VFM_STEPS(INTEL_KABYLAKE, 9, 13, 0x0000004e),
5393+
X86_MATCH_VFM_STEPS(INTEL_KABYLAKE_L, 9, 12, 0x0000004e),
54045394
{}
54055395
};
54065396

54075397
static void intel_check_pebs_isolation(void)
54085398
{
5409-
x86_pmu.pebs_no_isolation = !x86_cpu_has_min_microcode_rev(isolation_ucodes);
5399+
x86_pmu.pebs_no_isolation = !x86_match_min_microcode_rev(isolation_ucodes);
54105400
}
54115401

54125402
static __init void intel_pebs_isolation_quirk(void)
@@ -5416,16 +5406,16 @@ static __init void intel_pebs_isolation_quirk(void)
54165406
intel_check_pebs_isolation();
54175407
}
54185408

5419-
static const struct x86_cpu_desc pebs_ucodes[] = {
5420-
INTEL_CPU_DESC(INTEL_SANDYBRIDGE, 7, 0x00000028),
5421-
INTEL_CPU_DESC(INTEL_SANDYBRIDGE_X, 6, 0x00000618),
5422-
INTEL_CPU_DESC(INTEL_SANDYBRIDGE_X, 7, 0x0000070c),
5409+
static const struct x86_cpu_id pebs_ucodes[] = {
5410+
X86_MATCH_VFM_STEPS(INTEL_SANDYBRIDGE, 7, 7, 0x00000028),
5411+
X86_MATCH_VFM_STEPS(INTEL_SANDYBRIDGE_X, 6, 6, 0x00000618),
5412+
X86_MATCH_VFM_STEPS(INTEL_SANDYBRIDGE_X, 7, 7, 0x0000070c),
54235413
{}
54245414
};
54255415

54265416
static bool intel_snb_pebs_broken(void)
54275417
{
5428-
return !x86_cpu_has_min_microcode_rev(pebs_ucodes);
5418+
return !x86_match_min_microcode_rev(pebs_ucodes);
54295419
}
54305420

54315421
static void intel_snb_check_microcode(void)

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