57
57
58
58
#define VMW_BINDING_RT_BIT 0
59
59
#define VMW_BINDING_PS_BIT 1
60
- #define VMW_BINDING_SO_BIT 2
60
+ #define VMW_BINDING_SO_T_BIT 2
61
61
#define VMW_BINDING_VB_BIT 3
62
62
#define VMW_BINDING_UAV_BIT 4
63
63
#define VMW_BINDING_CS_UAV_BIT 5
@@ -98,7 +98,7 @@ struct vmw_ctx_binding_state {
98
98
struct vmw_ctx_bindinfo_view render_targets [SVGA3D_RT_MAX ];
99
99
struct vmw_ctx_bindinfo_tex texture_units [SVGA3D_NUM_TEXTURE_UNITS ];
100
100
struct vmw_ctx_bindinfo_view ds_view ;
101
- struct vmw_ctx_bindinfo_so so_targets [SVGA3D_DX_MAX_SOTARGETS ];
101
+ struct vmw_ctx_bindinfo_so_target so_targets [SVGA3D_DX_MAX_SOTARGETS ];
102
102
struct vmw_ctx_bindinfo_vb vertex_buffers [SVGA3D_DX_MAX_VERTEXBUFFERS ];
103
103
struct vmw_ctx_bindinfo_ib index_buffer ;
104
104
struct vmw_dx_shader_bindings per_shader [SVGA3D_NUM_SHADERTYPE ];
@@ -119,7 +119,7 @@ static int vmw_binding_scrub_texture(struct vmw_ctx_bindinfo *bi, bool rebind);
119
119
static int vmw_binding_scrub_cb (struct vmw_ctx_bindinfo * bi , bool rebind );
120
120
static int vmw_binding_scrub_dx_rt (struct vmw_ctx_bindinfo * bi , bool rebind );
121
121
static int vmw_binding_scrub_sr (struct vmw_ctx_bindinfo * bi , bool rebind );
122
- static int vmw_binding_scrub_so (struct vmw_ctx_bindinfo * bi , bool rebind );
122
+ static int vmw_binding_scrub_so_target (struct vmw_ctx_bindinfo * bi , bool rebind );
123
123
static int vmw_binding_emit_dirty (struct vmw_ctx_binding_state * cbs );
124
124
static int vmw_binding_scrub_dx_shader (struct vmw_ctx_bindinfo * bi ,
125
125
bool rebind );
@@ -187,7 +187,7 @@ static const size_t vmw_binding_sr_offsets[] = {
187
187
offsetof(struct vmw_ctx_binding_state , per_shader [4 ].shader_res ),
188
188
offsetof(struct vmw_ctx_binding_state , per_shader [5 ].shader_res ),
189
189
};
190
- static const size_t vmw_binding_so_offsets [] = {
190
+ static const size_t vmw_binding_so_target_offsets [] = {
191
191
offsetof(struct vmw_ctx_binding_state , so_targets ),
192
192
};
193
193
static const size_t vmw_binding_vb_offsets [] = {
@@ -236,10 +236,10 @@ static const struct vmw_binding_info vmw_binding_infos[] = {
236
236
.size = sizeof (struct vmw_ctx_bindinfo_view ),
237
237
.offsets = vmw_binding_dx_ds_offsets ,
238
238
.scrub_func = vmw_binding_scrub_dx_rt },
239
- [vmw_ctx_binding_so ] = {
240
- .size = sizeof (struct vmw_ctx_bindinfo_so ),
241
- .offsets = vmw_binding_so_offsets ,
242
- .scrub_func = vmw_binding_scrub_so },
239
+ [vmw_ctx_binding_so_target ] = {
240
+ .size = sizeof (struct vmw_ctx_bindinfo_so_target ),
241
+ .offsets = vmw_binding_so_target_offsets ,
242
+ .scrub_func = vmw_binding_scrub_so_target },
243
243
[vmw_ctx_binding_vb ] = {
244
244
.size = sizeof (struct vmw_ctx_bindinfo_vb ),
245
245
.offsets = vmw_binding_vb_offsets ,
@@ -874,8 +874,8 @@ static void vmw_collect_so_targets(struct vmw_ctx_binding_state *cbs,
874
874
const struct vmw_ctx_bindinfo * bi ,
875
875
u32 max_num )
876
876
{
877
- const struct vmw_ctx_bindinfo_so * biso =
878
- container_of (bi , struct vmw_ctx_bindinfo_so , bi );
877
+ const struct vmw_ctx_bindinfo_so_target * biso =
878
+ container_of (bi , struct vmw_ctx_bindinfo_so_target , bi );
879
879
unsigned long i ;
880
880
SVGA3dSoTarget * so_buffer = (SVGA3dSoTarget * ) cbs -> bind_cmd_buffer ;
881
881
@@ -900,11 +900,11 @@ static void vmw_collect_so_targets(struct vmw_ctx_binding_state *cbs,
900
900
}
901
901
902
902
/**
903
- * vmw_binding_emit_set_so - Issue delayed streamout binding commands
903
+ * vmw_emit_set_so_target - Issue delayed streamout binding commands
904
904
*
905
905
* @cbs: Pointer to the context's struct vmw_ctx_binding_state
906
906
*/
907
- static int vmw_emit_set_so (struct vmw_ctx_binding_state * cbs )
907
+ static int vmw_emit_set_so_target (struct vmw_ctx_binding_state * cbs )
908
908
{
909
909
const struct vmw_ctx_bindinfo * loc = & cbs -> so_targets [0 ].bi ;
910
910
struct {
@@ -1136,8 +1136,8 @@ static int vmw_binding_emit_dirty(struct vmw_ctx_binding_state *cbs)
1136
1136
case VMW_BINDING_PS_BIT :
1137
1137
ret = vmw_binding_emit_dirty_ps (cbs );
1138
1138
break ;
1139
- case VMW_BINDING_SO_BIT :
1140
- ret = vmw_emit_set_so (cbs );
1139
+ case VMW_BINDING_SO_T_BIT :
1140
+ ret = vmw_emit_set_so_target (cbs );
1141
1141
break ;
1142
1142
case VMW_BINDING_VB_BIT :
1143
1143
ret = vmw_emit_set_vb (cbs );
@@ -1201,18 +1201,18 @@ static int vmw_binding_scrub_dx_rt(struct vmw_ctx_bindinfo *bi, bool rebind)
1201
1201
}
1202
1202
1203
1203
/**
1204
- * vmw_binding_scrub_so - Schedule a dx streamoutput buffer binding
1204
+ * vmw_binding_scrub_so_target - Schedule a dx streamoutput buffer binding
1205
1205
* scrub from a context
1206
1206
*
1207
1207
* @bi: single binding information.
1208
1208
* @rebind: Whether to issue a bind instead of scrub command.
1209
1209
*/
1210
- static int vmw_binding_scrub_so (struct vmw_ctx_bindinfo * bi , bool rebind )
1210
+ static int vmw_binding_scrub_so_target (struct vmw_ctx_bindinfo * bi , bool rebind )
1211
1211
{
1212
1212
struct vmw_ctx_binding_state * cbs =
1213
1213
vmw_context_binding_state (bi -> ctx );
1214
1214
1215
- __set_bit (VMW_BINDING_SO_BIT , & cbs -> dirty );
1215
+ __set_bit (VMW_BINDING_SO_T_BIT , & cbs -> dirty );
1216
1216
1217
1217
return 0 ;
1218
1218
}
@@ -1387,7 +1387,7 @@ u32 vmw_binding_dirtying(enum vmw_ctx_binding_type binding_type)
1387
1387
[vmw_ctx_binding_rt ] = VMW_RES_DIRTY_SET ,
1388
1388
[vmw_ctx_binding_dx_rt ] = VMW_RES_DIRTY_SET ,
1389
1389
[vmw_ctx_binding_ds ] = VMW_RES_DIRTY_SET ,
1390
- [vmw_ctx_binding_so ] = VMW_RES_DIRTY_SET ,
1390
+ [vmw_ctx_binding_so_target ] = VMW_RES_DIRTY_SET ,
1391
1391
[vmw_ctx_binding_uav ] = VMW_RES_DIRTY_SET ,
1392
1392
[vmw_ctx_binding_cs_uav ] = VMW_RES_DIRTY_SET ,
1393
1393
};
0 commit comments