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Merge tag 'mmc-v6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC updates from Ulf Hansson: " MMC core: - Enable host caps to be modified via debugfs to test speed-modes - Improve random I/O writes for 4k buffers for hsq enabled hosts MMC host: - atmel-mci/sdhci-of-at91: Aubin Constans takes over as maintainer - dw_mmc-starfive: Re-work tuning support - meson-gx: Fix bogus IRQ when using CMD_CFG_ERROR - mmci: Use peripheral flow control for the STM32 variant - renesas,sdhi: Add support for the RZ/G3S variant - sdhci-esdhc-imx: Optimize the manual tuning logic - sdhci-msm: Add support for the SM8650 variant - sdhci-npcm: Add driver to support the Nuvoton NPCM BMC variant - sdhci-pci-gli: Add workaround to allow GL9750 to enter ASPM L1.2" * tag 'mmc-v6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (25 commits) dt-bindings: mmc: sdhci-msm: document the SM8650 SDHCI Controller mmc: meson-gx: Remove setting of CMD_CFG_ERROR MAINTAINERS: mmc: take over as maintainer of MCI & SDHCI MICROCHIP DRIVERS mmc: jz4740: Use device_get_match_data() mmc: sdhci-npcm: Add NPCM SDHCI driver dt-bindings: mmc: npcm,sdhci: Document NPCM SDHCI controller mmc: sdhci-pltfm: Make driver OF independent mmc: sdhci-pltfm: Drop unnecessary error messages in sdhci_pltfm_init() mmc: sdhci-pci: Switch to use acpi_evaluate_dsm_typed() mmc: debugfs: Allow host caps to be modified mmc: core: Always reselect card type mmc: mmci: use peripheral flow control for STM32 mmc: vub300: replace deprecated strncpy with strscpy memstick: jmb38x_ms: Annotate struct jmb38x_ms with __counted_by mmc: starfive: Change tuning implementation dt-bindings: mmc: starfive: Remove properties from required mmc: hsq: Improve random I/O write performance for 4k buffers mmc: core: Allow dynamical updates of the number of requests for hsq mmc: sdhci-pci-gli: A workaround to allow GL9750 to enter ASPM L1.2 dt-bindings: mmc: renesas,sdhi: Document RZ/G3S support ...
2 parents 0364249 + 5428a40 commit 40aa597

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+384
-184
lines changed

‎Documentation/devicetree/bindings/mmc/npcm,sdhci.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mmc/npcm,sdhci.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NPCM SDHCI Controller
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maintainers:
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- Tomer Maimon <[email protected]>
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allOf:
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- $ref: mmc-controller.yaml#
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properties:
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compatible:
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enum:
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- nuvoton,npcm750-sdhci
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- nuvoton,npcm845-sdhci
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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unevaluatedProperties: false
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examples:
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- |
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mmc@f0840000 {
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compatible = "nuvoton,npcm750-sdhci";
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reg = <0xf0840000 0x200>;
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interrupts = <0 27 4>;
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clocks = <&clk 4>;
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};

‎Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml

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@@ -59,6 +59,7 @@ properties:
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- renesas,sdhi-r9a07g043 # RZ/G2UL
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- renesas,sdhi-r9a07g044 # RZ/G2{L,LC}
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- renesas,sdhi-r9a07g054 # RZ/V2L
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- renesas,sdhi-r9a08g045 # RZ/G3S
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- renesas,sdhi-r9a09g011 # RZ/V2M
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- const: renesas,rcar-gen3-sdhi # R-Car Gen3 or RZ/G2
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- items:
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- renesas,sdhi-r9a07g043
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- renesas,sdhi-r9a07g044
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- renesas,sdhi-r9a07g054
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- renesas,sdhi-r9a08g045
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- renesas,sdhi-r9a09g011
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then:
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properties:

‎Documentation/devicetree/bindings/mmc/sdhci-msm.yaml

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@@ -58,6 +58,7 @@ properties:
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- qcom,sm8350-sdhci
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- qcom,sm8450-sdhci
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- qcom,sm8550-sdhci
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- qcom,sm8650-sdhci
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- const: qcom,sdhci-msm-v5 # for sdcc version 5.0
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reg:
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- const: iface
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- const: core
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- const: xo
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- const: ice
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- const: bus
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- const: cal
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- const: sleep
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- enum: [ice, bus, cal, sleep]
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- enum: [ice, bus, cal, sleep]
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- enum: [ice, bus, cal, sleep]
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- enum: [ice, bus, cal, sleep]
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dma-coherent: true
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‎Documentation/devicetree/bindings/mmc/starfive,jh7110-mmc.yaml

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- clocks
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- clock-names
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- interrupts
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- starfive,sysreg
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unevaluatedProperties: false
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@@ -73,5 +72,4 @@ examples:
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fifo-depth = <32>;
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fifo-watermark-aligned;
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data-addr = <0>;
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starfive,sysreg = <&sys_syscon 0x14 0x1a 0x7c000000>;
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};

‎MAINTAINERS

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@@ -14110,7 +14110,7 @@ F: Documentation/devicetree/bindings/iio/adc/microchip,mcp3911.yaml
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F: drivers/iio/adc/mcp3911.c
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MICROCHIP MMC/SD/SDIO MCI DRIVER
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M: Ludovic Desroches <ludovic.desroches@microchip.com>
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M: Aubin Constans <aubin.constans@microchip.com>
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S: Maintained
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F: drivers/mmc/host/atmel-mci.c
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@@ -19335,7 +19335,8 @@ F: Documentation/devicetree/bindings/mmc/sdhci-common.yaml
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F: drivers/mmc/host/sdhci*
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SECURE DIGITAL HOST CONTROLLER INTERFACE (SDHCI) MICROCHIP DRIVER
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M: Eugen Hristev <[email protected]>
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M: Aubin Constans <[email protected]>
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R: Eugen Hristev <[email protected]>
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L: [email protected]
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S: Supported
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F: drivers/mmc/host/sdhci-of-at91.c

‎drivers/memstick/host/jmb38x_ms.c

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@@ -66,7 +66,7 @@ struct jmb38x_ms_host {
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struct jmb38x_ms {
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struct pci_dev *pdev;
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int host_cnt;
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struct memstick_host *hosts[];
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struct memstick_host *hosts[] __counted_by(host_cnt);
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};
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#define BLOCK_COUNT_MASK 0xffff0000

‎drivers/mmc/core/debugfs.c

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#include <linux/slab.h>
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#include <linux/stat.h>
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#include <linux/fault-inject.h>
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#include <linux/time.h>
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#include <linux/mmc/card.h>
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#include <linux/mmc/host.h>
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#include <linux/mmc/mmc.h>
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#include <linux/mmc/sd.h>
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#include "core.h"
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#include "card.h"
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.release = single_release,
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};
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static int mmc_caps_get(void *data, u64 *val)
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{
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*val = *(u32 *)data;
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return 0;
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}
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static int mmc_caps_set(void *data, u64 val)
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{
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u32 *caps = data;
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u32 diff = *caps ^ val;
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u32 allowed = MMC_CAP_AGGRESSIVE_PM |
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MMC_CAP_SD_HIGHSPEED |
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MMC_CAP_MMC_HIGHSPEED |
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MMC_CAP_UHS |
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MMC_CAP_DDR;
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if (diff & ~allowed)
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return -EINVAL;
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*caps = val;
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return 0;
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}
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static int mmc_caps2_set(void *data, u64 val)
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{
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u32 allowed = MMC_CAP2_HSX00_1_8V | MMC_CAP2_HSX00_1_2V;
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u32 *caps = data;
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u32 diff = *caps ^ val;
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if (diff & ~allowed)
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return -EINVAL;
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*caps = val;
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return 0;
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}
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DEFINE_DEBUGFS_ATTRIBUTE(mmc_caps_fops, mmc_caps_get, mmc_caps_set,
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"0x%08llx\n");
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DEFINE_DEBUGFS_ATTRIBUTE(mmc_caps2_fops, mmc_caps_get, mmc_caps2_set,
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"0x%08llx\n");
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void mmc_add_host_debugfs(struct mmc_host *host)
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{
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struct dentry *root;
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host->debugfs_root = root;
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308354
debugfs_create_file("ios", S_IRUSR, root, host, &mmc_ios_fops);
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debugfs_create_x32("caps", S_IRUSR, root, &host->caps);
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debugfs_create_x32("caps2", S_IRUSR, root, &host->caps2);
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debugfs_create_file("caps", 0600, root, &host->caps, &mmc_caps_fops);
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debugfs_create_file("caps2", 0600, root, &host->caps2,
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&mmc_caps2_fops);
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debugfs_create_file_unsafe("clock", S_IRUSR | S_IWUSR, root, host,
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&mmc_clock_fops);
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‎drivers/mmc/core/mmc.c

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@@ -419,7 +419,6 @@ static int mmc_decode_ext_csd(struct mmc_card *card, u8 *ext_csd)
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420420
card->ext_csd.strobe_support = ext_csd[EXT_CSD_STROBE_SUPPORT];
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card->ext_csd.raw_card_type = ext_csd[EXT_CSD_CARD_TYPE];
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mmc_select_card_type(card);
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card->ext_csd.raw_s_a_timeout = ext_csd[EXT_CSD_S_A_TIMEOUT];
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card->ext_csd.raw_erase_timeout_mult =
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17321731
mmc_set_erase_size(card);
17331732
}
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1734+
/*
1735+
* Reselect the card type since host caps could have been changed when
1736+
* debugging even if the card is not new.
1737+
*/
1738+
mmc_select_card_type(card);
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/* Enable ERASE_GRP_DEF. This bit is lost after a reset or power off. */
17361741
if (card->ext_csd.rev >= 3) {
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err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,

‎drivers/mmc/core/queue.c

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}
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break;
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case MMC_ISSUE_ASYNC:
263-
/*
264-
* For MMC host software queue, we only allow 2 requests in
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* flight to avoid a long latency.
266-
*/
267-
if (host->hsq_enabled && mq->in_flight[issue_type] > 2) {
263+
if (host->hsq_enabled && mq->in_flight[issue_type] > host->hsq_depth) {
268264
spin_unlock_irq(&mq->lock);
269265
return BLK_STS_RESOURCE;
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}

‎drivers/mmc/host/Kconfig

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430430
If unsure, say N.
431431

432+
config MMC_SDHCI_NPCM
433+
tristate "Secure Digital Host Controller Interface support for NPCM"
434+
depends on ARCH_NPCM || COMPILE_TEST
435+
depends on MMC_SDHCI_PLTFM
436+
help
437+
This provides support for the SD/eMMC controller found in
438+
NPCM BMC family SoCs.
439+
432440
config MMC_MESON_GX
433441
tristate "Amlogic S905/GX*/AXG SD/MMC Host Controller support"
434442
depends on ARCH_MESON|| COMPILE_TEST
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678686
config MMC_SDHI_INTERNAL_DMAC
679687
tristate "DMA for SDHI SD/SDIO controllers using on-chip bus mastering"
680-
depends on ARM64 || ARCH_R7S9210 || ARCH_R8A77470 || COMPILE_TEST
688+
depends on ARCH_RENESAS || COMPILE_TEST
681689
depends on MMC_SDHI
682-
default MMC_SDHI if (ARM64 || ARCH_R7S9210 || ARCH_R8A77470)
690+
default MMC_SDHI if ARCH_RENESAS
683691
help
684692
This provides DMA support for SDHI SD/SDIO controllers
685693
using on-chip bus mastering. This supports the controllers

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