@@ -556,6 +556,30 @@ static const struct clk_rpmh_desc clk_rpmh_sm6350 = {
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.num_clks = ARRAY_SIZE (sm6350_rpmh_clocks ),
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};
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+ DEFINE_CLK_RPMH_VRM (sdx65 , ln_bb_clk1 , ln_bb_clk1_ao , "lnbclka1" , 4 );
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+
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+ static struct clk_hw * sdx65_rpmh_clocks [] = {
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+ [RPMH_CXO_CLK ] = & sc7280_bi_tcxo .hw ,
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+ [RPMH_CXO_CLK_A ] = & sc7280_bi_tcxo_ao .hw ,
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+ [RPMH_LN_BB_CLK1 ] = & sdx65_ln_bb_clk1 .hw ,
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+ [RPMH_LN_BB_CLK1_A ] = & sdx65_ln_bb_clk1_ao .hw ,
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+ [RPMH_RF_CLK1 ] = & sdm845_rf_clk1 .hw ,
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+ [RPMH_RF_CLK1_A ] = & sdm845_rf_clk1_ao .hw ,
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+ [RPMH_RF_CLK2 ] = & sdm845_rf_clk2 .hw ,
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+ [RPMH_RF_CLK2_A ] = & sdm845_rf_clk2_ao .hw ,
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+ [RPMH_RF_CLK3 ] = & sdm845_rf_clk3 .hw ,
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+ [RPMH_RF_CLK3_A ] = & sdm845_rf_clk3_ao .hw ,
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+ [RPMH_RF_CLK4 ] = & sm8350_rf_clk4 .hw ,
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+ [RPMH_RF_CLK4_A ] = & sm8350_rf_clk4_ao .hw ,
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+ [RPMH_IPA_CLK ] = & sdm845_ipa .hw ,
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+ [RPMH_QPIC_CLK ] = & sdx55_qpic_clk .hw ,
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+ };
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+
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+ static const struct clk_rpmh_desc clk_rpmh_sdx65 = {
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+ .clks = sdx65_rpmh_clocks ,
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+ .num_clks = ARRAY_SIZE (sdx65_rpmh_clocks ),
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+ };
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+
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static struct clk_hw * of_clk_rpmh_hw_get (struct of_phandle_args * clkspec ,
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void * data )
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{
@@ -643,6 +667,7 @@ static const struct of_device_id clk_rpmh_match_table[] = {
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{ .compatible = "qcom,sc8180x-rpmh-clk" , .data = & clk_rpmh_sc8180x },
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{ .compatible = "qcom,sdm845-rpmh-clk" , .data = & clk_rpmh_sdm845 },
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{ .compatible = "qcom,sdx55-rpmh-clk" , .data = & clk_rpmh_sdx55 },
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+ { .compatible = "qcom,sdx65-rpmh-clk" , .data = & clk_rpmh_sdx65 },
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{ .compatible = "qcom,sm6350-rpmh-clk" , .data = & clk_rpmh_sm6350 },
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{ .compatible = "qcom,sm8150-rpmh-clk" , .data = & clk_rpmh_sm8150 },
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{ .compatible = "qcom,sm8250-rpmh-clk" , .data = & clk_rpmh_sm8250 },
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