@@ -481,7 +481,7 @@ static void vlv_dsi_device_ready(struct intel_encoder *encoder)
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* Common bit for both MIPI Port A & MIPI Port C
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* No similar bit in MIPI Port C reg
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*/
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- intel_de_rmw (dev_priv , MIPI_PORT_CTRL (PORT_A ), 0 , LP_OUTPUT_HOLD );
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+ intel_de_rmw (dev_priv , VLV_MIPI_PORT_CTRL (PORT_A ), 0 , LP_OUTPUT_HOLD );
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usleep_range (1000 , 1500 );
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intel_de_write (dev_priv , MIPI_DEVICE_READY (port ),
@@ -563,7 +563,7 @@ static void glk_dsi_clear_device_ready(struct intel_encoder *encoder)
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static i915_reg_t port_ctrl_reg (struct drm_i915_private * i915 , enum port port )
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{
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return IS_GEMINILAKE (i915 ) || IS_BROXTON (i915 ) ?
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- BXT_MIPI_PORT_CTRL (port ) : MIPI_PORT_CTRL (port );
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+ BXT_MIPI_PORT_CTRL (port ) : VLV_MIPI_PORT_CTRL (port );
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}
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static void vlv_dsi_clear_device_ready (struct intel_encoder * encoder )
@@ -576,7 +576,7 @@ static void vlv_dsi_clear_device_ready(struct intel_encoder *encoder)
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for_each_dsi_port (port , intel_dsi -> ports ) {
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/* Common bit for both MIPI Port A & MIPI Port C on VLV/CHV */
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i915_reg_t port_ctrl = IS_BROXTON (dev_priv ) ?
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- BXT_MIPI_PORT_CTRL (port ) : MIPI_PORT_CTRL (PORT_A );
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+ BXT_MIPI_PORT_CTRL (port ) : VLV_MIPI_PORT_CTRL (PORT_A );
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intel_de_write (dev_priv , MIPI_DEVICE_READY (port ),
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DEVICE_READY | ULPS_STATE_ENTER );
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