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QSchulzgregkh
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usb: dwc2: disable lpm feature on Rockchip SoCs
LPM feature of DWC2 module integrated in Rockchip SoCs doesn't work properly or needs some additional handling, so disable it for now. Without disabling LPM feature, the USB ADB communication fail with the following error log: dwc2 ff580000.usb: new address 27 dwc2 ff580000.usb: Failed to exit L1 sleep state in 200us. dwc2 ff580000.usb: dwc2_hsotg_send_reply: cannot queue req dwc2 ff580000.usb: dwc2_hsotg_process_req_status: failed to send reply dwc2 ff580000.usb: dwc2_hsotg_enqueue_setup: failed queue (-11) dwc2 ff580000.usb: Failed to exit L1 sleep state in 200us. [diff vs vendor kernel: added lpm_clock_gating, besl and hird_threshold_en settings as seen in commit 53febc9 ("usb: dwc2: disable Link Power Management on STM32MP15 HS OTG")] Signed-off-by: William Wu <[email protected]> Signed-off-by: Frank Wang <[email protected]> Signed-off-by: Quentin Schulz <[email protected]> Link: https://lore.kernel.org/r/20221206-dwc2-gadget-dual-role-v1-1-36515e1092cd@theobroma-systems.com Signed-off-by: Greg Kroah-Hartman <[email protected]>
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drivers/usb/dwc2/params.c

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@@ -113,6 +113,10 @@ static void dwc2_set_rk_params(struct dwc2_hsotg *hsotg)
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p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
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GAHBCFG_HBSTLEN_SHIFT;
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p->power_down = DWC2_POWER_DOWN_PARAM_NONE;
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p->lpm = false;
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p->lpm_clock_gating = false;
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p->besl = false;
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p->hird_threshold_en = false;
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}
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static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)

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