Skip to content

Commit 43756a2

Browse files
Victor Dingrafaeljw
authored andcommitted
powercap: Add AMD Fam17h RAPL support
Enable AMD Fam17h RAPL support for the power capping framework. The support is as per AMD Fam17h Model31h (Zen2) and model 00-ffh (Zen1) PPR. Tested by comparing the results of following two sysfs entries and the values directly read from corresponding MSRs via /dev/cpu/[x]/msr: /sys/class/powercap/intel-rapl/intel-rapl:0/energy_uj /sys/class/powercap/intel-rapl/intel-rapl:0/intel-rapl:0:0/energy_uj Signed-off-by: Victor Ding <[email protected]> Acked-by: Kim Phillips <[email protected]> [ rjw: Changelog edits ] Signed-off-by: Rafael J. Wysocki <[email protected]>
1 parent a2c32fa commit 43756a2

File tree

3 files changed

+26
-1
lines changed

3 files changed

+26
-1
lines changed

arch/x86/include/asm/msr-index.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -327,6 +327,7 @@
327327
#define MSR_PP1_POLICY 0x00000642
328328

329329
#define MSR_AMD_RAPL_POWER_UNIT 0xc0010299
330+
#define MSR_AMD_CORE_ENERGY_STATUS 0xc001029a
330331
#define MSR_AMD_PKG_ENERGY_STATUS 0xc001029b
331332

332333
/* Config TDP MSRs */

drivers/powercap/intel_rapl_common.c

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1011,6 +1011,10 @@ static const struct rapl_defaults rapl_defaults_cht = {
10111011
.compute_time_window = rapl_compute_time_window_atom,
10121012
};
10131013

1014+
static const struct rapl_defaults rapl_defaults_amd = {
1015+
.check_unit = rapl_check_unit_core,
1016+
};
1017+
10141018
static const struct x86_cpu_id rapl_ids[] __initconst = {
10151019
X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE, &rapl_defaults_core),
10161020
X86_MATCH_INTEL_FAM6_MODEL(SANDYBRIDGE_X, &rapl_defaults_core),
@@ -1061,6 +1065,8 @@ static const struct x86_cpu_id rapl_ids[] __initconst = {
10611065

10621066
X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNL, &rapl_defaults_hsw_server),
10631067
X86_MATCH_INTEL_FAM6_MODEL(XEON_PHI_KNM, &rapl_defaults_hsw_server),
1068+
1069+
X86_MATCH_VENDOR_FAM(AMD, 0x17, &rapl_defaults_amd),
10641070
{}
10651071
};
10661072
MODULE_DEVICE_TABLE(x86cpu, rapl_ids);

drivers/powercap/intel_rapl_msr.c

Lines changed: 19 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,14 @@ static struct rapl_if_priv rapl_msr_priv_intel = {
4949
.limits[RAPL_DOMAIN_PLATFORM] = 2,
5050
};
5151

52+
static struct rapl_if_priv rapl_msr_priv_amd = {
53+
.reg_unit = MSR_AMD_RAPL_POWER_UNIT,
54+
.regs[RAPL_DOMAIN_PACKAGE] = {
55+
0, MSR_AMD_PKG_ENERGY_STATUS, 0, 0, 0 },
56+
.regs[RAPL_DOMAIN_PP0] = {
57+
0, MSR_AMD_CORE_ENERGY_STATUS, 0, 0, 0 },
58+
};
59+
5260
/* Handles CPU hotplug on multi-socket systems.
5361
* If a CPU goes online as the first CPU of the physical package
5462
* we add the RAPL package to the system. Similarly, when the last
@@ -138,7 +146,17 @@ static int rapl_msr_probe(struct platform_device *pdev)
138146
const struct x86_cpu_id *id = x86_match_cpu(pl4_support_ids);
139147
int ret;
140148

141-
rapl_msr_priv = &rapl_msr_priv_intel;
149+
switch (boot_cpu_data.x86_vendor) {
150+
case X86_VENDOR_INTEL:
151+
rapl_msr_priv = &rapl_msr_priv_intel;
152+
break;
153+
case X86_VENDOR_AMD:
154+
rapl_msr_priv = &rapl_msr_priv_amd;
155+
break;
156+
default:
157+
pr_err("intel-rapl does not support CPU vendor %d\n", boot_cpu_data.x86_vendor);
158+
return -ENODEV;
159+
}
142160
rapl_msr_priv->read_raw = rapl_msr_read_raw;
143161
rapl_msr_priv->write_raw = rapl_msr_write_raw;
144162

0 commit comments

Comments
 (0)