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pmdomain: renesas: rcar-sysc: Split R-Car M3-W and M3-W+ sub-drivers
Currently R-Car M3-W and M3-W+ are handled by a single sub-driver, but using separate Kconfig symbols and separate rcar_sysc_info structures, and fixup code to handle the remaining differences. Prepare for handling more differences by splitting them in two separate sub-drivers. Signed-off-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Kuninori Morimoto <[email protected]> Link: https://lore.kernel.org/r/a416e2bae7227c08d7e7d158366ab021f4d6cc18.1713348705.git.geert+renesas@glider.be Signed-off-by: Ulf Hansson <[email protected]>
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-26
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3 files changed

+53
-26
lines changed

drivers/pmdomain/renesas/Makefile

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -14,8 +14,8 @@ obj-$(CONFIG_SYSC_R8A7791) += r8a7791-sysc.o
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obj-$(CONFIG_SYSC_R8A7792) += r8a7792-sysc.o
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obj-$(CONFIG_SYSC_R8A7794) += r8a7794-sysc.o
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obj-$(CONFIG_SYSC_R8A7795) += r8a7795-sysc.o
17-
obj-$(CONFIG_SYSC_R8A77960) += r8a7796-sysc.o
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obj-$(CONFIG_SYSC_R8A77961) += r8a7796-sysc.o
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obj-$(CONFIG_SYSC_R8A77960) += r8a77960-sysc.o
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obj-$(CONFIG_SYSC_R8A77961) += r8a77961-sysc.o
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obj-$(CONFIG_SYSC_R8A77965) += r8a77965-sysc.o
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obj-$(CONFIG_SYSC_R8A77970) += r8a77970-sysc.o
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obj-$(CONFIG_SYSC_R8A77980) += r8a77980-sysc.o

drivers/pmdomain/renesas/r8a7796-sysc.c renamed to drivers/pmdomain/renesas/r8a77960-sysc.c

Lines changed: 4 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// SPDX-License-Identifier: GPL-2.0
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/*
3-
* Renesas R-Car M3-W/W+ System Controller
3+
* Renesas R-Car M3-W System Controller
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*
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* Copyright (C) 2016 Glider bvba
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* Copyright (C) 2018-2019 Renesas Electronics Corporation
@@ -13,7 +13,7 @@
1313

1414
#include "rcar-sysc.h"
1515

16-
static struct rcar_sysc_area r8a7796_areas[] __initdata = {
16+
static const struct rcar_sysc_area r8a77960_areas[] __initconst = {
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{ "always-on", 0, 0, R8A7796_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
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{ "ca57-scu", 0x1c0, 0, R8A7796_PD_CA57_SCU, R8A7796_PD_ALWAYS_ON,
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PD_SCU },
@@ -41,27 +41,7 @@ static struct rcar_sysc_area r8a7796_areas[] __initdata = {
4141
};
4242

4343

44-
#ifdef CONFIG_SYSC_R8A77960
4544
const struct rcar_sysc_info r8a77960_sysc_info __initconst = {
46-
.areas = r8a7796_areas,
47-
.num_areas = ARRAY_SIZE(r8a7796_areas),
45+
.areas = r8a77960_areas,
46+
.num_areas = ARRAY_SIZE(r8a77960_areas),
4847
};
49-
#endif /* CONFIG_SYSC_R8A77960 */
50-
51-
#ifdef CONFIG_SYSC_R8A77961
52-
static int __init r8a77961_sysc_init(void)
53-
{
54-
rcar_sysc_nullify(r8a7796_areas, ARRAY_SIZE(r8a7796_areas),
55-
R8A7796_PD_A2VC0);
56-
57-
return 0;
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}
59-
60-
const struct rcar_sysc_info r8a77961_sysc_info __initconst = {
61-
.init = r8a77961_sysc_init,
62-
.areas = r8a7796_areas,
63-
.num_areas = ARRAY_SIZE(r8a7796_areas),
64-
.extmask_offs = 0x2f8,
65-
.extmask_val = BIT(0),
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};
67-
#endif /* CONFIG_SYSC_R8A77961 */
Lines changed: 47 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,47 @@
1+
// SPDX-License-Identifier: GPL-2.0
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/*
3+
* Renesas R-Car M3-W+ System Controller
4+
*
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* Copyright (C) 2016 Glider bvba
6+
* Copyright (C) 2018-2019 Renesas Electronics Corporation
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*/
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9+
#include <linux/bits.h>
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#include <linux/kernel.h>
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12+
#include <dt-bindings/power/r8a7796-sysc.h>
13+
14+
#include "rcar-sysc.h"
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16+
static const struct rcar_sysc_area r8a77961_areas[] __initconst = {
17+
{ "always-on", 0, 0, R8A7796_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
18+
{ "ca57-scu", 0x1c0, 0, R8A7796_PD_CA57_SCU, R8A7796_PD_ALWAYS_ON,
19+
PD_SCU },
20+
{ "ca57-cpu0", 0x80, 0, R8A7796_PD_CA57_CPU0, R8A7796_PD_CA57_SCU,
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PD_CPU_NOCR },
22+
{ "ca57-cpu1", 0x80, 1, R8A7796_PD_CA57_CPU1, R8A7796_PD_CA57_SCU,
23+
PD_CPU_NOCR },
24+
{ "ca53-scu", 0x140, 0, R8A7796_PD_CA53_SCU, R8A7796_PD_ALWAYS_ON,
25+
PD_SCU },
26+
{ "ca53-cpu0", 0x200, 0, R8A7796_PD_CA53_CPU0, R8A7796_PD_CA53_SCU,
27+
PD_CPU_NOCR },
28+
{ "ca53-cpu1", 0x200, 1, R8A7796_PD_CA53_CPU1, R8A7796_PD_CA53_SCU,
29+
PD_CPU_NOCR },
30+
{ "ca53-cpu2", 0x200, 2, R8A7796_PD_CA53_CPU2, R8A7796_PD_CA53_SCU,
31+
PD_CPU_NOCR },
32+
{ "ca53-cpu3", 0x200, 3, R8A7796_PD_CA53_CPU3, R8A7796_PD_CA53_SCU,
33+
PD_CPU_NOCR },
34+
{ "cr7", 0x240, 0, R8A7796_PD_CR7, R8A7796_PD_ALWAYS_ON },
35+
{ "a3vc", 0x380, 0, R8A7796_PD_A3VC, R8A7796_PD_ALWAYS_ON },
36+
{ "a2vc1", 0x3c0, 1, R8A7796_PD_A2VC1, R8A7796_PD_A3VC },
37+
{ "3dg-a", 0x100, 0, R8A7796_PD_3DG_A, R8A7796_PD_ALWAYS_ON },
38+
{ "3dg-b", 0x100, 1, R8A7796_PD_3DG_B, R8A7796_PD_3DG_A },
39+
{ "a3ir", 0x180, 0, R8A7796_PD_A3IR, R8A7796_PD_ALWAYS_ON },
40+
};
41+
42+
const struct rcar_sysc_info r8a77961_sysc_info __initconst = {
43+
.areas = r8a77961_areas,
44+
.num_areas = ARRAY_SIZE(r8a77961_areas),
45+
.extmask_offs = 0x2f8,
46+
.extmask_val = BIT(0),
47+
};

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