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kselftest/arm64: Add 2023 DPISA hwcap test coverage
Add the hwcaps added for the 2023 DPISA extensions to the hwcaps test program. Signed-off-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Catalin Marinas <[email protected]>
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‎tools/testing/selftests/arm64/abi/hwcap.c

Lines changed: 217 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -58,11 +58,46 @@ static void cssc_sigill(void)
5858
asm volatile(".inst 0xdac01c00" : : : "x0");
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}
6060

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static void f8cvt_sigill(void)
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{
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/* FSCALE V0.4H, V0.4H, V0.4H */
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asm volatile(".inst 0x2ec03c00");
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}
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static void f8dp2_sigill(void)
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{
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/* FDOT V0.4H, V0.4H, V0.5H */
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asm volatile(".inst 0xe40fc00");
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}
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static void f8dp4_sigill(void)
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{
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/* FDOT V0.2S, V0.2S, V0.2S */
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asm volatile(".inst 0xe00fc00");
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}
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static void f8fma_sigill(void)
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{
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/* FMLALB V0.8H, V0.16B, V0.16B */
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asm volatile(".inst 0xec0fc00");
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}
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static void faminmax_sigill(void)
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{
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/* FAMIN V0.4H, V0.4H, V0.4H */
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asm volatile(".inst 0x2ec01c00");
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}
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6191
static void fp_sigill(void)
6292
{
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asm volatile("fmov s0, #1");
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}
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static void fpmr_sigill(void)
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{
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asm volatile("mrs x0, S3_3_C4_C4_2" : : : "x0");
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}
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66101
static void ilrcpc_sigill(void)
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{
68103
/* LDAPUR W0, [SP, #8] */
@@ -95,6 +130,12 @@ static void lse128_sigill(void)
95130
: "cc", "memory");
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}
97132

133+
static void lut_sigill(void)
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{
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/* LUTI2 V0.16B, { V0.16B }, V[0] */
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asm volatile(".inst 0x4e801000");
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}
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98139
static void mops_sigill(void)
99140
{
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char dst[1], src[1];
@@ -216,6 +257,78 @@ static void smef16f16_sigill(void)
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asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
217258
}
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static void smef8f16_sigill(void)
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{
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/* SMSTART */
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asm volatile("msr S0_3_C4_C7_3, xzr" : : : );
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/* FDOT ZA.H[W0, 0], Z0.B-Z1.B, Z0.B-Z1.B */
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asm volatile(".inst 0xc1a01020" : : : );
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/* SMSTOP */
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asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
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}
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static void smef8f32_sigill(void)
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{
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/* SMSTART */
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asm volatile("msr S0_3_C4_C7_3, xzr" : : : );
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/* FDOT ZA.S[W0, 0], { Z0.B-Z1.B }, Z0.B[0] */
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asm volatile(".inst 0xc1500038" : : : );
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/* SMSTOP */
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asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
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}
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static void smelutv2_sigill(void)
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{
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/* SMSTART */
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asm volatile("msr S0_3_C4_C7_3, xzr" : : : );
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/* LUTI4 { Z0.B-Z3.B }, ZT0, { Z0-Z1 } */
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asm volatile(".inst 0xc08b0000" : : : );
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/* SMSTOP */
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asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
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}
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static void smesf8dp2_sigill(void)
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{
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/* SMSTART */
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asm volatile("msr S0_3_C4_C7_3, xzr" : : : );
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301+
/* FDOT Z0.H, Z0.B, Z0.B[0] */
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asm volatile(".inst 0x64204400" : : : );
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/* SMSTOP */
305+
asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
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}
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static void smesf8dp4_sigill(void)
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{
310+
/* SMSTART */
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asm volatile("msr S0_3_C4_C7_3, xzr" : : : );
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313+
/* FDOT Z0.S, Z0.B, Z0.B[0] */
314+
asm volatile(".inst 0xc1a41C00" : : : );
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/* SMSTOP */
317+
asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
318+
}
319+
320+
static void smesf8fma_sigill(void)
321+
{
322+
/* SMSTART */
323+
asm volatile("msr S0_3_C4_C7_3, xzr" : : : );
324+
325+
/* FMLALB V0.8H, V0.16B, V0.16B */
326+
asm volatile(".inst 0xec0fc00");
327+
328+
/* SMSTOP */
329+
asm volatile("msr S0_3_C4_C6_3, xzr" : : : );
330+
}
331+
219332
static void sve_sigill(void)
220333
{
221334
/* RDVL x0, #0 */
@@ -353,13 +466,68 @@ static const struct hwcap_data {
353466
.cpuinfo = "cssc",
354467
.sigill_fn = cssc_sigill,
355468
},
469+
{
470+
.name = "F8CVT",
471+
.at_hwcap = AT_HWCAP2,
472+
.hwcap_bit = HWCAP2_F8CVT,
473+
.cpuinfo = "f8cvt",
474+
.sigill_fn = f8cvt_sigill,
475+
},
476+
{
477+
.name = "F8DP4",
478+
.at_hwcap = AT_HWCAP2,
479+
.hwcap_bit = HWCAP2_F8DP4,
480+
.cpuinfo = "f8dp4",
481+
.sigill_fn = f8dp4_sigill,
482+
},
483+
{
484+
.name = "F8DP2",
485+
.at_hwcap = AT_HWCAP2,
486+
.hwcap_bit = HWCAP2_F8DP2,
487+
.cpuinfo = "f8dp4",
488+
.sigill_fn = f8dp2_sigill,
489+
},
490+
{
491+
.name = "F8E5M2",
492+
.at_hwcap = AT_HWCAP2,
493+
.hwcap_bit = HWCAP2_F8E5M2,
494+
.cpuinfo = "f8e5m2",
495+
},
496+
{
497+
.name = "F8E4M3",
498+
.at_hwcap = AT_HWCAP2,
499+
.hwcap_bit = HWCAP2_F8E4M3,
500+
.cpuinfo = "f8e4m3",
501+
},
502+
{
503+
.name = "F8FMA",
504+
.at_hwcap = AT_HWCAP2,
505+
.hwcap_bit = HWCAP2_F8FMA,
506+
.cpuinfo = "f8fma",
507+
.sigill_fn = f8fma_sigill,
508+
},
509+
{
510+
.name = "FAMINMAX",
511+
.at_hwcap = AT_HWCAP2,
512+
.hwcap_bit = HWCAP2_FAMINMAX,
513+
.cpuinfo = "faminmax",
514+
.sigill_fn = faminmax_sigill,
515+
},
356516
{
357517
.name = "FP",
358518
.at_hwcap = AT_HWCAP,
359519
.hwcap_bit = HWCAP_FP,
360520
.cpuinfo = "fp",
361521
.sigill_fn = fp_sigill,
362522
},
523+
{
524+
.name = "FPMR",
525+
.at_hwcap = AT_HWCAP2,
526+
.hwcap_bit = HWCAP2_FPMR,
527+
.cpuinfo = "fpmr",
528+
.sigill_fn = fpmr_sigill,
529+
.sigill_reliable = true,
530+
},
363531
{
364532
.name = "JSCVT",
365533
.at_hwcap = AT_HWCAP,
@@ -411,6 +579,13 @@ static const struct hwcap_data {
411579
.cpuinfo = "lse128",
412580
.sigill_fn = lse128_sigill,
413581
},
582+
{
583+
.name = "LUT",
584+
.at_hwcap = AT_HWCAP2,
585+
.hwcap_bit = HWCAP2_LUT,
586+
.cpuinfo = "lut",
587+
.sigill_fn = lut_sigill,
588+
},
414589
{
415590
.name = "MOPS",
416591
.at_hwcap = AT_HWCAP2,
@@ -511,6 +686,48 @@ static const struct hwcap_data {
511686
.cpuinfo = "smef16f16",
512687
.sigill_fn = smef16f16_sigill,
513688
},
689+
{
690+
.name = "SME F8F16",
691+
.at_hwcap = AT_HWCAP2,
692+
.hwcap_bit = HWCAP2_SME_F8F16,
693+
.cpuinfo = "smef8f16",
694+
.sigill_fn = smef8f16_sigill,
695+
},
696+
{
697+
.name = "SME F8F32",
698+
.at_hwcap = AT_HWCAP2,
699+
.hwcap_bit = HWCAP2_SME_F8F32,
700+
.cpuinfo = "smef8f32",
701+
.sigill_fn = smef8f32_sigill,
702+
},
703+
{
704+
.name = "SME LUTV2",
705+
.at_hwcap = AT_HWCAP2,
706+
.hwcap_bit = HWCAP2_SME_LUTV2,
707+
.cpuinfo = "smelutv2",
708+
.sigill_fn = smelutv2_sigill,
709+
},
710+
{
711+
.name = "SME SF8FMA",
712+
.at_hwcap = AT_HWCAP2,
713+
.hwcap_bit = HWCAP2_SME_SF8FMA,
714+
.cpuinfo = "smesf8fma",
715+
.sigill_fn = smesf8fma_sigill,
716+
},
717+
{
718+
.name = "SME SF8DP2",
719+
.at_hwcap = AT_HWCAP2,
720+
.hwcap_bit = HWCAP2_SME_SF8DP2,
721+
.cpuinfo = "smesf8dp2",
722+
.sigill_fn = smesf8dp2_sigill,
723+
},
724+
{
725+
.name = "SME SF8DP4",
726+
.at_hwcap = AT_HWCAP2,
727+
.hwcap_bit = HWCAP2_SME_SF8DP4,
728+
.cpuinfo = "smesf8dp4",
729+
.sigill_fn = smesf8dp4_sigill,
730+
},
514731
{
515732
.name = "SVE",
516733
.at_hwcap = AT_HWCAP,

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