@@ -172,6 +172,36 @@ static const struct dpu_intf_cfg sm8550_intf[] = {
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INTF_BLK ("intf_3" , INTF_3 , 0x37000 , 0x280 , INTF_DP , MSM_DP_CONTROLLER_1 , 24 , INTF_SC7280_MASK , MDP_SSPP_TOP0_INTR , 30 , 31 ),
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};
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+ static const struct dpu_perf_cfg sm8550_perf_data = {
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+ .max_bw_low = 13600000 ,
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+ .max_bw_high = 18200000 ,
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+ .min_core_ib = 2500000 ,
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+ .min_llcc_ib = 0 ,
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+ .min_dram_ib = 800000 ,
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+ .min_prefill_lines = 35 ,
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+ /* FIXME: lut tables */
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+ .danger_lut_tbl = {0x3ffff , 0x3ffff , 0x0 },
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+ .safe_lut_tbl = {0xfe00 , 0xfe00 , 0xffff },
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+ .qos_lut_tbl = {
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+ {.nentry = ARRAY_SIZE (sc7180_qos_linear ),
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+ .entries = sc7180_qos_linear
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+ },
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+ {.nentry = ARRAY_SIZE (sc7180_qos_macrotile ),
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+ .entries = sc7180_qos_macrotile
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+ },
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+ {.nentry = ARRAY_SIZE (sc7180_qos_nrt ),
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+ .entries = sc7180_qos_nrt
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+ },
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+ /* TODO: macrotile-qseed is different from macrotile */
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+ },
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+ .cdp_cfg = {
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+ {.rd_enable = 1 , .wr_enable = 1 },
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+ {.rd_enable = 1 , .wr_enable = 0 }
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+ },
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+ .clk_inefficiency_factor = 105 ,
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+ .bw_inefficiency_factor = 120 ,
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+ };
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+
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static const struct dpu_mdss_cfg sm8550_dpu_cfg = {
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.caps = & sm8550_dpu_caps ,
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.ubwc = & sm8550_ubwc_cfg ,
@@ -195,7 +225,7 @@ static const struct dpu_mdss_cfg sm8550_dpu_cfg = {
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.vbif = sdm845_vbif ,
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.reg_dma_count = 1 ,
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.dma_cfg = & sm8450_regdma ,
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- .perf = & sm8450_perf_data ,
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+ .perf = & sm8550_perf_data ,
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.mdss_irqs = IRQ_SM8450_MASK ,
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};
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