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airliedairlied
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Merge tag 'mediatek-drm-fixes-5.8' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-fixes
Mediatek DRM Fixes for Linux 5.8 This include fixup for cmdq, mmsys, visibility checking and some refinement. Signed-off-by: Dave Airlie <[email protected]> From: Chun-Kuang Hu <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2 parents dcb7fd8 + 5ab546f commit 46a20c9

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7 files changed

+22
-88
lines changed

7 files changed

+22
-88
lines changed

‎drivers/gpu/drm/mediatek/Kconfig

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,12 +6,12 @@ config DRM_MEDIATEK
66
depends on COMMON_CLK
77
depends on HAVE_ARM_SMCCC
88
depends on OF
9+
depends on MTK_MMSYS
910
select DRM_GEM_CMA_HELPER
1011
select DRM_KMS_HELPER
1112
select DRM_MIPI_DSI
1213
select DRM_PANEL
1314
select MEMORY
14-
select MTK_MMSYS
1515
select MTK_SMI
1616
select VIDEOMODE_HELPERS
1717
help

‎drivers/gpu/drm/mediatek/mtk_drm_crtc.c

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -193,7 +193,6 @@ static int mtk_crtc_ddp_clk_enable(struct mtk_drm_crtc *mtk_crtc)
193193
int ret;
194194
int i;
195195

196-
DRM_DEBUG_DRIVER("%s\n", __func__);
197196
for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {
198197
ret = clk_prepare_enable(mtk_crtc->ddp_comp[i]->clk);
199198
if (ret) {
@@ -213,7 +212,6 @@ static void mtk_crtc_ddp_clk_disable(struct mtk_drm_crtc *mtk_crtc)
213212
{
214213
int i;
215214

216-
DRM_DEBUG_DRIVER("%s\n", __func__);
217215
for (i = 0; i < mtk_crtc->ddp_comp_nr; i++)
218216
clk_disable_unprepare(mtk_crtc->ddp_comp[i]->clk);
219217
}
@@ -258,7 +256,6 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc)
258256
int ret;
259257
int i;
260258

261-
DRM_DEBUG_DRIVER("%s\n", __func__);
262259
if (WARN_ON(!crtc->state))
263260
return -EINVAL;
264261

@@ -299,7 +296,6 @@ static int mtk_crtc_ddp_hw_init(struct mtk_drm_crtc *mtk_crtc)
299296
goto err_mutex_unprepare;
300297
}
301298

302-
DRM_DEBUG_DRIVER("mediatek_ddp_ddp_path_setup\n");
303299
for (i = 0; i < mtk_crtc->ddp_comp_nr - 1; i++) {
304300
mtk_mmsys_ddp_connect(mtk_crtc->mmsys_dev,
305301
mtk_crtc->ddp_comp[i]->id,
@@ -349,7 +345,6 @@ static void mtk_crtc_ddp_hw_fini(struct mtk_drm_crtc *mtk_crtc)
349345
struct drm_crtc *crtc = &mtk_crtc->base;
350346
int i;
351347

352-
DRM_DEBUG_DRIVER("%s\n", __func__);
353348
for (i = 0; i < mtk_crtc->ddp_comp_nr; i++) {
354349
mtk_ddp_comp_stop(mtk_crtc->ddp_comp[i]);
355350
if (i == 1)
@@ -831,7 +826,8 @@ int mtk_drm_crtc_create(struct drm_device *drm_dev,
831826

832827
#if IS_REACHABLE(CONFIG_MTK_CMDQ)
833828
mtk_crtc->cmdq_client =
834-
cmdq_mbox_create(dev, drm_crtc_index(&mtk_crtc->base),
829+
cmdq_mbox_create(mtk_crtc->mmsys_dev,
830+
drm_crtc_index(&mtk_crtc->base),
835831
2000);
836832
if (IS_ERR(mtk_crtc->cmdq_client)) {
837833
dev_dbg(dev, "mtk_crtc %d failed to create mailbox client, writing register by CPU now\n",

‎drivers/gpu/drm/mediatek/mtk_drm_drv.c

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -444,7 +444,6 @@ static int mtk_drm_probe(struct platform_device *pdev)
444444
if (!private)
445445
return -ENOMEM;
446446

447-
private->data = of_device_get_match_data(dev);
448447
private->mmsys_dev = dev->parent;
449448
if (!private->mmsys_dev) {
450449
dev_err(dev, "Failed to get MMSYS device\n");
@@ -514,7 +513,8 @@ static int mtk_drm_probe(struct platform_device *pdev)
514513
goto err_node;
515514
}
516515

517-
ret = mtk_ddp_comp_init(dev, node, comp, comp_id, NULL);
516+
ret = mtk_ddp_comp_init(dev->parent, node, comp,
517+
comp_id, NULL);
518518
if (ret) {
519519
of_node_put(node);
520520
goto err_node;
@@ -571,7 +571,6 @@ static int mtk_drm_sys_suspend(struct device *dev)
571571
int ret;
572572

573573
ret = drm_mode_config_helper_suspend(drm);
574-
DRM_DEBUG_DRIVER("mtk_drm_sys_suspend\n");
575574

576575
return ret;
577576
}
@@ -583,7 +582,6 @@ static int mtk_drm_sys_resume(struct device *dev)
583582
int ret;
584583

585584
ret = drm_mode_config_helper_resume(drm);
586-
DRM_DEBUG_DRIVER("mtk_drm_sys_resume\n");
587585

588586
return ret;
589587
}

‎drivers/gpu/drm/mediatek/mtk_drm_plane.c

Lines changed: 15 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -164,6 +164,16 @@ static int mtk_plane_atomic_check(struct drm_plane *plane,
164164
true, true);
165165
}
166166

167+
static void mtk_plane_atomic_disable(struct drm_plane *plane,
168+
struct drm_plane_state *old_state)
169+
{
170+
struct mtk_plane_state *state = to_mtk_plane_state(plane->state);
171+
172+
state->pending.enable = false;
173+
wmb(); /* Make sure the above parameter is set before update */
174+
state->pending.dirty = true;
175+
}
176+
167177
static void mtk_plane_atomic_update(struct drm_plane *plane,
168178
struct drm_plane_state *old_state)
169179
{
@@ -178,6 +188,11 @@ static void mtk_plane_atomic_update(struct drm_plane *plane,
178188
if (!crtc || WARN_ON(!fb))
179189
return;
180190

191+
if (!plane->state->visible) {
192+
mtk_plane_atomic_disable(plane, old_state);
193+
return;
194+
}
195+
181196
gem = fb->obj[0];
182197
mtk_gem = to_mtk_gem_obj(gem);
183198
addr = mtk_gem->dma_addr;
@@ -200,16 +215,6 @@ static void mtk_plane_atomic_update(struct drm_plane *plane,
200215
state->pending.dirty = true;
201216
}
202217

203-
static void mtk_plane_atomic_disable(struct drm_plane *plane,
204-
struct drm_plane_state *old_state)
205-
{
206-
struct mtk_plane_state *state = to_mtk_plane_state(plane->state);
207-
208-
state->pending.enable = false;
209-
wmb(); /* Make sure the above parameter is set before update */
210-
state->pending.dirty = true;
211-
}
212-
213218
static const struct drm_plane_helper_funcs mtk_plane_helper_funcs = {
214219
.prepare_fb = drm_gem_fb_prepare_fb,
215220
.atomic_check = mtk_plane_atomic_check,

‎drivers/gpu/drm/mediatek/mtk_dsi.c

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -316,10 +316,7 @@ static void mtk_dsi_lane0_ulp_mode_leave(struct mtk_dsi *dsi)
316316

317317
static bool mtk_dsi_clk_hs_state(struct mtk_dsi *dsi)
318318
{
319-
u32 tmp_reg1;
320-
321-
tmp_reg1 = readl(dsi->regs + DSI_PHY_LCCON);
322-
return ((tmp_reg1 & LC_HS_TX_EN) == 1) ? true : false;
319+
return readl(dsi->regs + DSI_PHY_LCCON) & LC_HS_TX_EN;
323320
}
324321

325322
static void mtk_dsi_clk_hs_mode(struct mtk_dsi *dsi, bool enter)

‎drivers/gpu/drm/mediatek/mtk_hdmi.c

Lines changed: 1 addition & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1630,8 +1630,6 @@ static int mtk_hdmi_audio_startup(struct device *dev, void *data)
16301630
{
16311631
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
16321632

1633-
dev_dbg(dev, "%s\n", __func__);
1634-
16351633
mtk_hdmi_audio_enable(hdmi);
16361634

16371635
return 0;
@@ -1641,8 +1639,6 @@ static void mtk_hdmi_audio_shutdown(struct device *dev, void *data)
16411639
{
16421640
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
16431641

1644-
dev_dbg(dev, "%s\n", __func__);
1645-
16461642
mtk_hdmi_audio_disable(hdmi);
16471643
}
16481644

@@ -1651,8 +1647,6 @@ mtk_hdmi_audio_digital_mute(struct device *dev, void *data, bool enable)
16511647
{
16521648
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
16531649

1654-
dev_dbg(dev, "%s(%d)\n", __func__, enable);
1655-
16561650
if (enable)
16571651
mtk_hdmi_hw_aud_mute(hdmi);
16581652
else
@@ -1665,8 +1659,6 @@ static int mtk_hdmi_audio_get_eld(struct device *dev, void *data, uint8_t *buf,
16651659
{
16661660
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
16671661

1668-
dev_dbg(dev, "%s\n", __func__);
1669-
16701662
memcpy(buf, hdmi->conn.eld, min(sizeof(hdmi->conn.eld), len));
16711663

16721664
return 0;
@@ -1766,7 +1758,6 @@ static int mtk_drm_hdmi_probe(struct platform_device *pdev)
17661758
goto err_bridge_remove;
17671759
}
17681760

1769-
dev_dbg(dev, "mediatek hdmi probe success\n");
17701761
return 0;
17711762

17721763
err_bridge_remove:
@@ -1789,7 +1780,7 @@ static int mtk_hdmi_suspend(struct device *dev)
17891780
struct mtk_hdmi *hdmi = dev_get_drvdata(dev);
17901781

17911782
mtk_hdmi_clk_disable_audio(hdmi);
1792-
dev_dbg(dev, "hdmi suspend success!\n");
1783+
17931784
return 0;
17941785
}
17951786

@@ -1804,7 +1795,6 @@ static int mtk_hdmi_resume(struct device *dev)
18041795
return ret;
18051796
}
18061797

1807-
dev_dbg(dev, "hdmi resume success!\n");
18081798
return 0;
18091799
}
18101800
#endif

‎drivers/gpu/drm/mediatek/mtk_mt8173_hdmi_phy.c

Lines changed: 0 additions & 52 deletions
Original file line numberDiff line numberDiff line change
@@ -107,60 +107,10 @@
107107
#define RGS_HDMITX_5T1_EDG (0xf << 4)
108108
#define RGS_HDMITX_PLUG_TST BIT(0)
109109

110-
static const u8 PREDIV[3][4] = {
111-
{0x0, 0x0, 0x0, 0x0}, /* 27Mhz */
112-
{0x1, 0x1, 0x1, 0x1}, /* 74Mhz */
113-
{0x1, 0x1, 0x1, 0x1} /* 148Mhz */
114-
};
115-
116-
static const u8 TXDIV[3][4] = {
117-
{0x3, 0x3, 0x3, 0x2}, /* 27Mhz */
118-
{0x2, 0x1, 0x1, 0x1}, /* 74Mhz */
119-
{0x1, 0x0, 0x0, 0x0} /* 148Mhz */
120-
};
121-
122-
static const u8 FBKSEL[3][4] = {
123-
{0x1, 0x1, 0x1, 0x1}, /* 27Mhz */
124-
{0x1, 0x0, 0x1, 0x1}, /* 74Mhz */
125-
{0x1, 0x0, 0x1, 0x1} /* 148Mhz */
126-
};
127-
128-
static const u8 FBKDIV[3][4] = {
129-
{19, 24, 29, 19}, /* 27Mhz */
130-
{19, 24, 14, 19}, /* 74Mhz */
131-
{19, 24, 14, 19} /* 148Mhz */
132-
};
133-
134-
static const u8 DIVEN[3][4] = {
135-
{0x2, 0x1, 0x1, 0x2}, /* 27Mhz */
136-
{0x2, 0x2, 0x2, 0x2}, /* 74Mhz */
137-
{0x2, 0x2, 0x2, 0x2} /* 148Mhz */
138-
};
139-
140-
static const u8 HTPLLBP[3][4] = {
141-
{0xc, 0xc, 0x8, 0xc}, /* 27Mhz */
142-
{0xc, 0xf, 0xf, 0xc}, /* 74Mhz */
143-
{0xc, 0xf, 0xf, 0xc} /* 148Mhz */
144-
};
145-
146-
static const u8 HTPLLBC[3][4] = {
147-
{0x2, 0x3, 0x3, 0x2}, /* 27Mhz */
148-
{0x2, 0x3, 0x3, 0x2}, /* 74Mhz */
149-
{0x2, 0x3, 0x3, 0x2} /* 148Mhz */
150-
};
151-
152-
static const u8 HTPLLBR[3][4] = {
153-
{0x1, 0x1, 0x0, 0x1}, /* 27Mhz */
154-
{0x1, 0x2, 0x2, 0x1}, /* 74Mhz */
155-
{0x1, 0x2, 0x2, 0x1} /* 148Mhz */
156-
};
157-
158110
static int mtk_hdmi_pll_prepare(struct clk_hw *hw)
159111
{
160112
struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
161113

162-
dev_dbg(hdmi_phy->dev, "%s\n", __func__);
163-
164114
mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_AUTOK_EN);
165115
mtk_hdmi_phy_set_bits(hdmi_phy, HDMI_CON0, RG_HDMITX_PLL_POSDIV);
166116
mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON3, RG_HDMITX_MHLCK_EN);
@@ -178,8 +128,6 @@ static void mtk_hdmi_pll_unprepare(struct clk_hw *hw)
178128
{
179129
struct mtk_hdmi_phy *hdmi_phy = to_mtk_hdmi_phy(hw);
180130

181-
dev_dbg(hdmi_phy->dev, "%s\n", __func__);
182-
183131
mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_TXDIV_EN);
184132
mtk_hdmi_phy_clear_bits(hdmi_phy, HDMI_CON1, RG_HDMITX_PLL_BIAS_LPF_EN);
185133
usleep_range(100, 150);

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