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Merge tag 'drm-intel-gt-next-2021-12-23' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
Driver Changes: - Added bits of DG2 support around page table handling (Stuart Summers, Matthew Auld) - Fixed wakeref leak in PMU busyness during reset in GuC mode (Umesh Nerlige Ramappa) - Fixed debugfs access crash if GuC failed to load (John Harrison) - Bring back GuC error log to error capture, undoing accidental earlier breakage (Thomas Hellström) - Fixed memory leak in error capture caused by earlier refactoring (Thomas Hellström) - Exclude reserved stolen from driver use (Chris Wilson) - Add memory region sanity checking and optional full test (Chris Wilson) - Fixed buffer size truncation in TTM shmemfs backend (Robert Beckett) - Use correct lock and don't overwrite internal data structures when stealing GuC context ids (Matthew Brost) - Don't hog IRQs when destroying GuC contexts (John Harrison) - Make GuC to Host communication more robust (Matthew Brost) - Continuation of locking refactoring around VMA and backing store handling (Maarten Lankhorst) - Improve performance of reading GuC log from debugfs (John Harrison) - Log when GuC fails to reset an engine (John Harrison) - Speed up GuC/HuC firmware loading by requesting RP0 (Vinay Belgaumkar) - Further work on asynchronous VMA unbinding (Thomas Hellström, Christian König) - Refactor GuC/HuC firmware handling to prepare for future platforms (John Harrison) - Prepare for future different GuC/HuC firmware signing key sizes (Daniele Ceraolo Spurio, Michal Wajdeczko) - Add noreclaim annotations (Matthew Auld) - Remove racey GEM_BUG_ON between GPU reset and GuC communication handling (Matthew Brost) - Refactor i915->gt with to_gt(i915) to prepare for future platforms (Michał Winiarski, Andi Shyti) - Increase GuC log size for CONFIG_DEBUG_GEM (John Harrison) - Fixed engine busyness in selftests when in GuC mode (Umesh Nerlige Ramappa) - Make engine parking work with PREEMPT_RT (Sebastian Andrzej Siewior) - Replace X86_FEATURE_PAT with pat_enabled() (Lucas De Marchi) - Selftest for stealing of guc ids (Matthew Brost) Signed-off-by: Dave Airlie <[email protected]> From: Tvrtko Ursulin <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/YcRvKO5cyPvIxVCi@tursulin-mobl2
2 parents 78942ae + 6cb12fb commit 4817c37

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126 files changed

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‎drivers/gpu/drm/i915/Makefile

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -163,6 +163,7 @@ i915-y += \
163163
i915_active.o \
164164
i915_buddy.o \
165165
i915_cmd_parser.o \
166+
i915_deps.o \
166167
i915_gem_evict.o \
167168
i915_gem_gtt.o \
168169
i915_gem_ww.o \

‎drivers/gpu/drm/i915/display/intel_atomic_plane.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -819,7 +819,7 @@ intel_prepare_plane_fb(struct drm_plane *_plane,
819819
* maximum clocks following a vblank miss (see do_rps_boost()).
820820
*/
821821
if (!state->rps_interactive) {
822-
intel_rps_mark_interactive(&dev_priv->gt.rps, true);
822+
intel_rps_mark_interactive(&to_gt(dev_priv)->rps, true);
823823
state->rps_interactive = true;
824824
}
825825

@@ -853,7 +853,7 @@ intel_cleanup_plane_fb(struct drm_plane *plane,
853853
return;
854854

855855
if (state->rps_interactive) {
856-
intel_rps_mark_interactive(&dev_priv->gt.rps, false);
856+
intel_rps_mark_interactive(&to_gt(dev_priv)->rps, false);
857857
state->rps_interactive = false;
858858
}
859859

‎drivers/gpu/drm/i915/display/intel_display.c

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -843,7 +843,7 @@ __intel_display_resume(struct drm_device *dev,
843843
static bool gpu_reset_clobbers_display(struct drm_i915_private *dev_priv)
844844
{
845845
return (INTEL_INFO(dev_priv)->gpu_reset_clobbers_display &&
846-
intel_has_gpu_reset(&dev_priv->gt));
846+
intel_has_gpu_reset(to_gt(dev_priv)));
847847
}
848848

849849
void intel_display_prepare_reset(struct drm_i915_private *dev_priv)
@@ -862,14 +862,14 @@ void intel_display_prepare_reset(struct drm_i915_private *dev_priv)
862862
return;
863863

864864
/* We have a modeset vs reset deadlock, defensively unbreak it. */
865-
set_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags);
865+
set_bit(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags);
866866
smp_mb__after_atomic();
867-
wake_up_bit(&dev_priv->gt.reset.flags, I915_RESET_MODESET);
867+
wake_up_bit(&to_gt(dev_priv)->reset.flags, I915_RESET_MODESET);
868868

869869
if (atomic_read(&dev_priv->gpu_error.pending_fb_pin)) {
870870
drm_dbg_kms(&dev_priv->drm,
871871
"Modeset potentially stuck, unbreaking through wedging\n");
872-
intel_gt_set_wedged(&dev_priv->gt);
872+
intel_gt_set_wedged(to_gt(dev_priv));
873873
}
874874

875875
/*
@@ -920,7 +920,7 @@ void intel_display_finish_reset(struct drm_i915_private *dev_priv)
920920
return;
921921

922922
/* reset doesn't touch the display */
923-
if (!test_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags))
923+
if (!test_bit(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags))
924924
return;
925925

926926
state = fetch_and_zero(&dev_priv->modeset_restore_state);
@@ -958,7 +958,7 @@ void intel_display_finish_reset(struct drm_i915_private *dev_priv)
958958
drm_modeset_acquire_fini(ctx);
959959
mutex_unlock(&dev->mode_config.mutex);
960960

961-
clear_bit_unlock(I915_RESET_MODESET, &dev_priv->gt.reset.flags);
961+
clear_bit_unlock(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags);
962962
}
963963

964964
static void icl_set_pipe_chicken(const struct intel_crtc_state *crtc_state)
@@ -8513,19 +8513,19 @@ static void intel_atomic_commit_fence_wait(struct intel_atomic_state *intel_stat
85138513
for (;;) {
85148514
prepare_to_wait(&intel_state->commit_ready.wait,
85158515
&wait_fence, TASK_UNINTERRUPTIBLE);
8516-
prepare_to_wait(bit_waitqueue(&dev_priv->gt.reset.flags,
8516+
prepare_to_wait(bit_waitqueue(&to_gt(dev_priv)->reset.flags,
85178517
I915_RESET_MODESET),
85188518
&wait_reset, TASK_UNINTERRUPTIBLE);
85198519

85208520

85218521
if (i915_sw_fence_done(&intel_state->commit_ready) ||
8522-
test_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags))
8522+
test_bit(I915_RESET_MODESET, &to_gt(dev_priv)->reset.flags))
85238523
break;
85248524

85258525
schedule();
85268526
}
85278527
finish_wait(&intel_state->commit_ready.wait, &wait_fence);
8528-
finish_wait(bit_waitqueue(&dev_priv->gt.reset.flags,
8528+
finish_wait(bit_waitqueue(&to_gt(dev_priv)->reset.flags,
85298529
I915_RESET_MODESET),
85308530
&wait_reset);
85318531
}

‎drivers/gpu/drm/i915/display/intel_dpt.c

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -264,7 +264,7 @@ intel_dpt_create(struct intel_framebuffer *fb)
264264

265265
vm = &dpt->vm;
266266

267-
vm->gt = &i915->gt;
267+
vm->gt = to_gt(i915);
268268
vm->i915 = i915;
269269
vm->dma = i915->drm.dev;
270270
vm->total = (size / sizeof(gen8_pte_t)) * I915_GTT_PAGE_SIZE;
@@ -279,8 +279,6 @@ intel_dpt_create(struct intel_framebuffer *fb)
279279

280280
vm->vma_ops.bind_vma = dpt_bind_vma;
281281
vm->vma_ops.unbind_vma = dpt_unbind_vma;
282-
vm->vma_ops.set_pages = ggtt_set_pages;
283-
vm->vma_ops.clear_pages = clear_pages;
284282

285283
vm->pte_encode = gen8_ggtt_pte_encode;
286284

‎drivers/gpu/drm/i915/display/intel_overlay.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1382,7 +1382,7 @@ void intel_overlay_setup(struct drm_i915_private *dev_priv)
13821382
if (!HAS_OVERLAY(dev_priv))
13831383
return;
13841384

1385-
engine = dev_priv->gt.engine[RCS0];
1385+
engine = to_gt(dev_priv)->engine[RCS0];
13861386
if (!engine || !engine->kernel_context)
13871387
return;
13881388

‎drivers/gpu/drm/i915/display/skl_universal_plane.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1737,7 +1737,7 @@ static bool bo_has_valid_encryption(struct drm_i915_gem_object *obj)
17371737
{
17381738
struct drm_i915_private *i915 = to_i915(obj->base.dev);
17391739

1740-
return intel_pxp_key_check(&i915->gt.pxp, obj, false) == 0;
1740+
return intel_pxp_key_check(&to_gt(i915)->pxp, obj, false) == 0;
17411741
}
17421742

17431743
static bool pxp_is_borked(struct drm_i915_gem_object *obj)

‎drivers/gpu/drm/i915/gem/i915_gem_context.c

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -237,7 +237,7 @@ static int proto_context_set_persistence(struct drm_i915_private *i915,
237237
* colateral damage, and we should not pretend we can by
238238
* exposing the interface.
239239
*/
240-
if (!intel_has_reset_engine(&i915->gt))
240+
if (!intel_has_reset_engine(to_gt(i915)))
241241
return -ENODEV;
242242

243243
pc->user_flags &= ~BIT(UCONTEXT_PERSISTENCE);
@@ -254,7 +254,7 @@ static int proto_context_set_protected(struct drm_i915_private *i915,
254254

255255
if (!protected) {
256256
pc->uses_protected_content = false;
257-
} else if (!intel_pxp_is_enabled(&i915->gt.pxp)) {
257+
} else if (!intel_pxp_is_enabled(&to_gt(i915)->pxp)) {
258258
ret = -ENODEV;
259259
} else if ((pc->user_flags & BIT(UCONTEXT_RECOVERABLE)) ||
260260
!(pc->user_flags & BIT(UCONTEXT_BANNABLE))) {
@@ -268,8 +268,8 @@ static int proto_context_set_protected(struct drm_i915_private *i915,
268268
*/
269269
pc->pxp_wakeref = intel_runtime_pm_get(&i915->runtime_pm);
270270

271-
if (!intel_pxp_is_active(&i915->gt.pxp))
272-
ret = intel_pxp_start(&i915->gt.pxp);
271+
if (!intel_pxp_is_active(&to_gt(i915)->pxp))
272+
ret = intel_pxp_start(&to_gt(i915)->pxp);
273273
}
274274

275275
return ret;
@@ -571,7 +571,7 @@ set_proto_ctx_engines_parallel_submit(struct i915_user_extension __user *base,
571571
intel_engine_mask_t prev_mask;
572572

573573
/* FIXME: This is NIY for execlists */
574-
if (!(intel_uc_uses_guc_submission(&i915->gt.uc)))
574+
if (!(intel_uc_uses_guc_submission(&to_gt(i915)->uc)))
575575
return -ENODEV;
576576

577577
if (get_user(slot, &ext->engine_index))
@@ -833,7 +833,7 @@ static int set_proto_ctx_sseu(struct drm_i915_file_private *fpriv,
833833
sseu = &pc->legacy_rcs_sseu;
834834
}
835835

836-
ret = i915_gem_user_to_context_sseu(&i915->gt, &user_sseu, sseu);
836+
ret = i915_gem_user_to_context_sseu(to_gt(i915), &user_sseu, sseu);
837837
if (ret)
838838
return ret;
839839

@@ -1044,7 +1044,7 @@ static struct i915_gem_engines *alloc_engines(unsigned int count)
10441044
static struct i915_gem_engines *default_engines(struct i915_gem_context *ctx,
10451045
struct intel_sseu rcs_sseu)
10461046
{
1047-
const struct intel_gt *gt = &ctx->i915->gt;
1047+
const struct intel_gt *gt = to_gt(ctx->i915);
10481048
struct intel_engine_cs *engine;
10491049
struct i915_gem_engines *e, *err;
10501050
enum intel_engine_id id;
@@ -1521,7 +1521,7 @@ static int __context_set_persistence(struct i915_gem_context *ctx, bool state)
15211521
* colateral damage, and we should not pretend we can by
15221522
* exposing the interface.
15231523
*/
1524-
if (!intel_has_reset_engine(&ctx->i915->gt))
1524+
if (!intel_has_reset_engine(to_gt(ctx->i915)))
15251525
return -ENODEV;
15261526

15271527
i915_gem_context_clear_persistence(ctx);
@@ -1559,7 +1559,7 @@ i915_gem_create_context(struct drm_i915_private *i915,
15591559
} else if (HAS_FULL_PPGTT(i915)) {
15601560
struct i915_ppgtt *ppgtt;
15611561

1562-
ppgtt = i915_ppgtt_create(&i915->gt, 0);
1562+
ppgtt = i915_ppgtt_create(to_gt(i915), 0);
15631563
if (IS_ERR(ppgtt)) {
15641564
drm_dbg(&i915->drm, "PPGTT setup failed (%ld)\n",
15651565
PTR_ERR(ppgtt));
@@ -1742,7 +1742,7 @@ int i915_gem_vm_create_ioctl(struct drm_device *dev, void *data,
17421742
if (args->flags)
17431743
return -EINVAL;
17441744

1745-
ppgtt = i915_ppgtt_create(&i915->gt, 0);
1745+
ppgtt = i915_ppgtt_create(to_gt(i915), 0);
17461746
if (IS_ERR(ppgtt))
17471747
return PTR_ERR(ppgtt);
17481748

@@ -2194,7 +2194,7 @@ int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
21942194
if (args->flags & I915_CONTEXT_CREATE_FLAGS_UNKNOWN)
21952195
return -EINVAL;
21962196

2197-
ret = intel_gt_terminally_wedged(&i915->gt);
2197+
ret = intel_gt_terminally_wedged(to_gt(i915));
21982198
if (ret)
21992199
return ret;
22002200

‎drivers/gpu/drm/i915/gem/i915_gem_create.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -379,7 +379,7 @@ static int ext_set_protected(struct i915_user_extension __user *base, void *data
379379
if (ext.flags)
380380
return -EINVAL;
381381

382-
if (!intel_pxp_is_enabled(&ext_data->i915->gt.pxp))
382+
if (!intel_pxp_is_enabled(&to_gt(ext_data->i915)->pxp))
383383
return -ENODEV;
384384

385385
ext_data->flags |= I915_BO_PROTECTED;

‎drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c

Lines changed: 51 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1098,6 +1098,47 @@ static inline struct i915_ggtt *cache_to_ggtt(struct reloc_cache *cache)
10981098
return &i915->ggtt;
10991099
}
11001100

1101+
static void reloc_cache_unmap(struct reloc_cache *cache)
1102+
{
1103+
void *vaddr;
1104+
1105+
if (!cache->vaddr)
1106+
return;
1107+
1108+
vaddr = unmask_page(cache->vaddr);
1109+
if (cache->vaddr & KMAP)
1110+
kunmap_atomic(vaddr);
1111+
else
1112+
io_mapping_unmap_atomic((void __iomem *)vaddr);
1113+
}
1114+
1115+
static void reloc_cache_remap(struct reloc_cache *cache,
1116+
struct drm_i915_gem_object *obj)
1117+
{
1118+
void *vaddr;
1119+
1120+
if (!cache->vaddr)
1121+
return;
1122+
1123+
if (cache->vaddr & KMAP) {
1124+
struct page *page = i915_gem_object_get_page(obj, cache->page);
1125+
1126+
vaddr = kmap_atomic(page);
1127+
cache->vaddr = unmask_flags(cache->vaddr) |
1128+
(unsigned long)vaddr;
1129+
} else {
1130+
struct i915_ggtt *ggtt = cache_to_ggtt(cache);
1131+
unsigned long offset;
1132+
1133+
offset = cache->node.start;
1134+
if (!drm_mm_node_allocated(&cache->node))
1135+
offset += cache->page << PAGE_SHIFT;
1136+
1137+
cache->vaddr = (unsigned long)
1138+
io_mapping_map_atomic_wc(&ggtt->iomap, offset);
1139+
}
1140+
}
1141+
11011142
static void reloc_cache_reset(struct reloc_cache *cache, struct i915_execbuffer *eb)
11021143
{
11031144
void *vaddr;
@@ -1362,10 +1403,17 @@ eb_relocate_entry(struct i915_execbuffer *eb,
13621403
* batchbuffers.
13631404
*/
13641405
if (reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
1365-
GRAPHICS_VER(eb->i915) == 6) {
1406+
GRAPHICS_VER(eb->i915) == 6 &&
1407+
!i915_vma_is_bound(target->vma, I915_VMA_GLOBAL_BIND)) {
1408+
struct i915_vma *vma = target->vma;
1409+
1410+
reloc_cache_unmap(&eb->reloc_cache);
1411+
mutex_lock(&vma->vm->mutex);
13661412
err = i915_vma_bind(target->vma,
13671413
target->vma->obj->cache_level,
13681414
PIN_GLOBAL, NULL);
1415+
mutex_unlock(&vma->vm->mutex);
1416+
reloc_cache_remap(&eb->reloc_cache, ev->vma->obj);
13691417
if (err)
13701418
return err;
13711419
}
@@ -2361,9 +2409,9 @@ static int eb_submit(struct i915_execbuffer *eb)
23612409
return err;
23622410
}
23632411

2364-
static int num_vcs_engines(const struct drm_i915_private *i915)
2412+
static int num_vcs_engines(struct drm_i915_private *i915)
23652413
{
2366-
return hweight_long(VDBOX_MASK(&i915->gt));
2414+
return hweight_long(VDBOX_MASK(to_gt(i915)));
23672415
}
23682416

23692417
/*

‎drivers/gpu/drm/i915/gem/i915_gem_mman.c

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -73,7 +73,7 @@ i915_gem_mmap_ioctl(struct drm_device *dev, void *data,
7373
if (args->flags & ~(I915_MMAP_WC))
7474
return -EINVAL;
7575

76-
if (args->flags & I915_MMAP_WC && !boot_cpu_has(X86_FEATURE_PAT))
76+
if (args->flags & I915_MMAP_WC && !pat_enabled())
7777
return -ENODEV;
7878

7979
obj = i915_gem_object_lookup(file, args->handle);
@@ -646,7 +646,7 @@ mmap_offset_attach(struct drm_i915_gem_object *obj,
646646
goto insert;
647647

648648
/* Attempt to reap some mmap space from dead objects */
649-
err = intel_gt_retire_requests_timeout(&i915->gt, MAX_SCHEDULE_TIMEOUT,
649+
err = intel_gt_retire_requests_timeout(to_gt(i915), MAX_SCHEDULE_TIMEOUT,
650650
NULL);
651651
if (err)
652652
goto err;
@@ -737,7 +737,7 @@ i915_gem_dumb_mmap_offset(struct drm_file *file,
737737

738738
if (HAS_LMEM(to_i915(dev)))
739739
mmap_type = I915_MMAP_TYPE_FIXED;
740-
else if (boot_cpu_has(X86_FEATURE_PAT))
740+
else if (pat_enabled())
741741
mmap_type = I915_MMAP_TYPE_WC;
742742
else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt))
743743
return -ENODEV;
@@ -793,7 +793,7 @@ i915_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,
793793
break;
794794

795795
case I915_MMAP_OFFSET_WC:
796-
if (!boot_cpu_has(X86_FEATURE_PAT))
796+
if (!pat_enabled())
797797
return -ENODEV;
798798
type = I915_MMAP_TYPE_WC;
799799
break;
@@ -803,7 +803,7 @@ i915_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,
803803
break;
804804

805805
case I915_MMAP_OFFSET_UC:
806-
if (!boot_cpu_has(X86_FEATURE_PAT))
806+
if (!pat_enabled())
807807
return -ENODEV;
808808
type = I915_MMAP_TYPE_UC;
809809
break;

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