Skip to content

Commit 487355f

Browse files
jgoulywilldeacon
authored andcommitted
KVM: selftests: get-reg-list: add Permission Overlay registers
Add new system registers: - POR_EL1 - POR_EL0 Signed-off-by: Joey Gouly <[email protected]> Cc: Catalin Marinas <[email protected]> Cc: Will Deacon <[email protected]> Cc: Marc Zyngier <[email protected]> Cc: Oliver Upton <[email protected]> Cc: Shuah Khan <[email protected]> Reviewed-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
1 parent 70ed723 commit 487355f

File tree

1 file changed

+14
-0
lines changed

1 file changed

+14
-0
lines changed

tools/testing/selftests/kvm/aarch64/get-reg-list.c

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -40,6 +40,18 @@ static struct feature_id_reg feat_id_regs[] = {
4040
ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */
4141
4,
4242
1
43+
},
44+
{
45+
ARM64_SYS_REG(3, 0, 10, 2, 4), /* POR_EL1 */
46+
ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */
47+
16,
48+
1
49+
},
50+
{
51+
ARM64_SYS_REG(3, 3, 10, 2, 4), /* POR_EL0 */
52+
ARM64_SYS_REG(3, 0, 0, 7, 3), /* ID_AA64MMFR3_EL1 */
53+
16,
54+
1
4355
}
4456
};
4557

@@ -468,13 +480,15 @@ static __u64 base_regs[] = {
468480
ARM64_SYS_REG(3, 0, 10, 2, 0), /* MAIR_EL1 */
469481
ARM64_SYS_REG(3, 0, 10, 2, 2), /* PIRE0_EL1 */
470482
ARM64_SYS_REG(3, 0, 10, 2, 3), /* PIR_EL1 */
483+
ARM64_SYS_REG(3, 0, 10, 2, 4), /* POR_EL1 */
471484
ARM64_SYS_REG(3, 0, 10, 3, 0), /* AMAIR_EL1 */
472485
ARM64_SYS_REG(3, 0, 12, 0, 0), /* VBAR_EL1 */
473486
ARM64_SYS_REG(3, 0, 12, 1, 1), /* DISR_EL1 */
474487
ARM64_SYS_REG(3, 0, 13, 0, 1), /* CONTEXTIDR_EL1 */
475488
ARM64_SYS_REG(3, 0, 13, 0, 4), /* TPIDR_EL1 */
476489
ARM64_SYS_REG(3, 0, 14, 1, 0), /* CNTKCTL_EL1 */
477490
ARM64_SYS_REG(3, 2, 0, 0, 0), /* CSSELR_EL1 */
491+
ARM64_SYS_REG(3, 3, 10, 2, 4), /* POR_EL0 */
478492
ARM64_SYS_REG(3, 3, 13, 0, 2), /* TPIDR_EL0 */
479493
ARM64_SYS_REG(3, 3, 13, 0, 3), /* TPIDRRO_EL0 */
480494
ARM64_SYS_REG(3, 3, 14, 0, 1), /* CNTPCT_EL0 */

0 commit comments

Comments
 (0)