@@ -40,6 +40,18 @@ static struct feature_id_reg feat_id_regs[] = {
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ARM64_SYS_REG (3 , 0 , 0 , 7 , 3 ), /* ID_AA64MMFR3_EL1 */
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4 ,
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1
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+ },
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+ {
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+ ARM64_SYS_REG (3 , 0 , 10 , 2 , 4 ), /* POR_EL1 */
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+ ARM64_SYS_REG (3 , 0 , 0 , 7 , 3 ), /* ID_AA64MMFR3_EL1 */
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+ 16 ,
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+ 1
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+ },
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+ {
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+ ARM64_SYS_REG (3 , 3 , 10 , 2 , 4 ), /* POR_EL0 */
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+ ARM64_SYS_REG (3 , 0 , 0 , 7 , 3 ), /* ID_AA64MMFR3_EL1 */
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+ 16 ,
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+ 1
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}
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};
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@@ -468,13 +480,15 @@ static __u64 base_regs[] = {
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ARM64_SYS_REG (3 , 0 , 10 , 2 , 0 ), /* MAIR_EL1 */
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ARM64_SYS_REG (3 , 0 , 10 , 2 , 2 ), /* PIRE0_EL1 */
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ARM64_SYS_REG (3 , 0 , 10 , 2 , 3 ), /* PIR_EL1 */
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+ ARM64_SYS_REG (3 , 0 , 10 , 2 , 4 ), /* POR_EL1 */
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ARM64_SYS_REG (3 , 0 , 10 , 3 , 0 ), /* AMAIR_EL1 */
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ARM64_SYS_REG (3 , 0 , 12 , 0 , 0 ), /* VBAR_EL1 */
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ARM64_SYS_REG (3 , 0 , 12 , 1 , 1 ), /* DISR_EL1 */
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ARM64_SYS_REG (3 , 0 , 13 , 0 , 1 ), /* CONTEXTIDR_EL1 */
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ARM64_SYS_REG (3 , 0 , 13 , 0 , 4 ), /* TPIDR_EL1 */
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ARM64_SYS_REG (3 , 0 , 14 , 1 , 0 ), /* CNTKCTL_EL1 */
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ARM64_SYS_REG (3 , 2 , 0 , 0 , 0 ), /* CSSELR_EL1 */
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+ ARM64_SYS_REG (3 , 3 , 10 , 2 , 4 ), /* POR_EL0 */
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ARM64_SYS_REG (3 , 3 , 13 , 0 , 2 ), /* TPIDR_EL0 */
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ARM64_SYS_REG (3 , 3 , 13 , 0 , 3 ), /* TPIDRRO_EL0 */
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ARM64_SYS_REG (3 , 3 , 14 , 0 , 1 ), /* CNTPCT_EL0 */
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