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1 parent 9677be0 commit 4920776Copy full SHA for 4920776
arch/x86/kernel/cpu/amd.c
@@ -1065,7 +1065,7 @@ static void init_amd(struct cpuinfo_x86 *c)
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*/
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if (spectre_v2_in_eibrs_mode(spectre_v2_enabled) &&
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cpu_has(c, X86_FEATURE_AUTOIBRS))
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- WARN_ON_ONCE(msr_set_bit(MSR_EFER, _EFER_AUTOIBRS));
+ WARN_ON_ONCE(msr_set_bit(MSR_EFER, _EFER_AUTOIBRS) < 0);
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/* AMD CPUs don't need fencing after x2APIC/TSC_DEADLINE MSR writes. */
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clear_cpu_cap(c, X86_FEATURE_APIC_MSRS_FENCE);
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