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Merge tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt
arm64: dts: amlogic: updates for v5.9 (round 2) - new board: WeTek Core2 - audio playback support on more boards - add GPU DVFS * tag 'amlogic-dt64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: arm64: dts: amlogic: meson-g12: add the Mali OPP table and use DVFS arm64: dts: amlogic: meson-gxm: add the Mali OPP table and use DVFS arm64: dts: amlogic: meson-gx: add the Mali-450 OPP table and use DVFS arm64: dts: meson: add support for the WeTek Core 2 dt-bindings: arm: amlogic: add support for the WeTek Core 2 arm64: dts: meson: add audio playback to khadas-vim3l arm64: dts: meson: add audio playback to odroid-c4 arm64: dts: meson: update spifc node name on Khadas VIM3/VIM3L ARM: dts: meson: Align L2 cache-controller nodename with dtschema arm64: dts: meson-gxl-s805x: reduce initial Mali450 core frequency arm64: dts: meson: add missing gxl rng clock soc: amlogic: meson-gx-socinfo: Fix S905X3 and S905D3 ID's Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2 parents 33c56ed + 916a0ed commit 4a77526

17 files changed

+447
-114
lines changed

‎Documentation/devicetree/bindings/arm/amlogic.yaml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -121,6 +121,7 @@ properties:
121121
- libretech,aml-s912-pc
122122
- nexbox,a1
123123
- tronsmart,vega-s96
124+
- wetek,core2
124125
- const: amlogic,s912
125126
- const: amlogic,meson-gxm
126127

‎arch/arm/boot/dts/meson.dtsi

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11,7 +11,7 @@
1111
#size-cells = <1>;
1212
interrupt-parent = <&gic>;
1313

14-
L2: l2-cache-controller@c4200000 {
14+
L2: cache-controller@c4200000 {
1515
compatible = "arm,pl310-cache";
1616
reg = <0xc4200000 0x1000>;
1717
cache-unified;

‎arch/arm64/boot/dts/amlogic/Makefile

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Original file line numberDiff line numberDiff line change
@@ -41,6 +41,7 @@ dtb-$(CONFIG_ARCH_MESON) += meson-gxm-q201.dtb
4141
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-rbox-pro.dtb
4242
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-s912-libretech-pc.dtb
4343
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-vega-s96.dtb
44+
dtb-$(CONFIG_ARCH_MESON) += meson-gxm-wetek-core2.dtb
4445
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-sei610.dtb
4546
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-khadas-vim3l.dtb
4647
dtb-$(CONFIG_ARCH_MESON) += meson-sm1-odroid-c4.dtb

‎arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi

Lines changed: 34 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -52,6 +52,39 @@
5252
secure-monitor = <&sm>;
5353
};
5454

55+
gpu_opp_table: gpu-opp-table {
56+
compatible = "operating-points-v2";
57+
58+
opp-124999998 {
59+
opp-hz = /bits/ 64 <124999998>;
60+
opp-microvolt = <800000>;
61+
};
62+
opp-249999996 {
63+
opp-hz = /bits/ 64 <249999996>;
64+
opp-microvolt = <800000>;
65+
};
66+
opp-285714281 {
67+
opp-hz = /bits/ 64 <285714281>;
68+
opp-microvolt = <800000>;
69+
};
70+
opp-399999994 {
71+
opp-hz = /bits/ 64 <399999994>;
72+
opp-microvolt = <800000>;
73+
};
74+
opp-499999992 {
75+
opp-hz = /bits/ 64 <499999992>;
76+
opp-microvolt = <800000>;
77+
};
78+
opp-666666656 {
79+
opp-hz = /bits/ 64 <666666656>;
80+
opp-microvolt = <800000>;
81+
};
82+
opp-799999987 {
83+
opp-hz = /bits/ 64 <799999987>;
84+
opp-microvolt = <800000>;
85+
};
86+
};
87+
5588
psci {
5689
compatible = "arm,psci-1.0";
5790
method = "smc";
@@ -2362,21 +2395,7 @@
23622395
interrupt-names = "job", "mmu", "gpu";
23632396
clocks = <&clkc CLKID_MALI>;
23642397
resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>;
2365-
2366-
/*
2367-
* Mali clocking is provided by two identical clock paths
2368-
* MALI_0 and MALI_1 muxed to a single clock by a glitch
2369-
* free mux to safely change frequency while running.
2370-
*/
2371-
assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
2372-
<&clkc CLKID_MALI_0>,
2373-
<&clkc CLKID_MALI>; /* Glitch free mux */
2374-
assigned-clock-parents = <&clkc CLKID_FCLK_DIV2P5>,
2375-
<0>, /* Do Nothing */
2376-
<&clkc CLKID_MALI_0>;
2377-
assigned-clock-rates = <0>, /* Do Nothing */
2378-
<800000000>,
2379-
<0>; /* Do Nothing */
2398+
operating-points-v2 = <&gpu_opp_table>;
23802399
#cooling-cells = <2>;
23812400
};
23822401
};

‎arch/arm64/boot/dts/amlogic/meson-gx-mali450.dtsi

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,61 @@
1+
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2+
/*
3+
* Copyright (c) 2017 BayLibre SAS
4+
* Author: Neil Armstrong <[email protected]>
5+
*/
6+
7+
/ {
8+
gpu_opp_table: opp-table {
9+
compatible = "operating-points-v2";
10+
11+
opp-125000000 {
12+
opp-hz = /bits/ 64 <125000000>;
13+
opp-microvolt = <950000>;
14+
};
15+
opp-250000000 {
16+
opp-hz = /bits/ 64 <250000000>;
17+
opp-microvolt = <950000>;
18+
};
19+
opp-285714285 {
20+
opp-hz = /bits/ 64 <285714285>;
21+
opp-microvolt = <950000>;
22+
};
23+
opp-400000000 {
24+
opp-hz = /bits/ 64 <400000000>;
25+
opp-microvolt = <950000>;
26+
};
27+
opp-500000000 {
28+
opp-hz = /bits/ 64 <500000000>;
29+
opp-microvolt = <950000>;
30+
};
31+
opp-666666666 {
32+
opp-hz = /bits/ 64 <666666666>;
33+
opp-microvolt = <950000>;
34+
};
35+
opp-744000000 {
36+
opp-hz = /bits/ 64 <744000000>;
37+
opp-microvolt = <950000>;
38+
};
39+
};
40+
};
41+
42+
&apb {
43+
mali: gpu@c0000 {
44+
compatible = "arm,mali-450";
45+
reg = <0x0 0xc0000 0x0 0x40000>;
46+
interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
47+
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
48+
<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
49+
<GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
50+
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
51+
<GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
52+
<GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
53+
<GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
54+
<GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
55+
<GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
56+
interrupt-names = "gp", "gpmmu", "pp", "pmu",
57+
"pp0", "ppmmu0", "pp1", "ppmmu1",
58+
"pp2", "ppmmu2";
59+
operating-points-v2 = <&gpu_opp_table>;
60+
};
61+
};

‎arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi

Lines changed: 11 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@
44
*/
55

66
#include "meson-gx.dtsi"
7+
#include "meson-gx-mali450.dtsi"
78
#include <dt-bindings/gpio/meson-gxbb-gpio.h>
89
#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
910
#include <dt-bindings/clock/gxbb-clkc.h>
@@ -264,46 +265,6 @@
264265
};
265266
};
266267

267-
&apb {
268-
mali: gpu@c0000 {
269-
compatible = "amlogic,meson-gxbb-mali", "arm,mali-450";
270-
reg = <0x0 0xc0000 0x0 0x40000>;
271-
interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
272-
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
273-
<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
274-
<GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
275-
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
276-
<GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
277-
<GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
278-
<GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
279-
<GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
280-
<GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
281-
interrupt-names = "gp", "gpmmu", "pp", "pmu",
282-
"pp0", "ppmmu0", "pp1", "ppmmu1",
283-
"pp2", "ppmmu2";
284-
clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
285-
clock-names = "bus", "core";
286-
287-
/*
288-
* Mali clocking is provided by two identical clock paths
289-
* MALI_0 and MALI_1 muxed to a single clock by a glitch
290-
* free mux to safely change frequency while running.
291-
*/
292-
assigned-clocks = <&clkc CLKID_GP0_PLL>,
293-
<&clkc CLKID_MALI_0_SEL>,
294-
<&clkc CLKID_MALI_0>,
295-
<&clkc CLKID_MALI>; /* Glitch free mux */
296-
assigned-clock-parents = <0>, /* Do Nothing */
297-
<&clkc CLKID_GP0_PLL>,
298-
<0>, /* Do Nothing */
299-
<&clkc CLKID_MALI_0>;
300-
assigned-clock-rates = <744000000>,
301-
<0>, /* Do Nothing */
302-
<744000000>,
303-
<0>; /* Do Nothing */
304-
};
305-
};
306-
307268
&cbus {
308269
spifc: spi@8c80 {
309270
compatible = "amlogic,meson-gxbb-spifc";
@@ -386,6 +347,16 @@
386347
clocks = <&clkc CLKID_I2C>;
387348
};
388349

350+
&mali {
351+
compatible = "amlogic,meson-gxbb-mali", "arm,mali-450";
352+
353+
clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
354+
clock-names = "bus", "core";
355+
356+
assigned-clocks = <&clkc CLKID_GP0_PLL>;
357+
assigned-clock-rates = <744000000>;
358+
};
359+
389360
&periphs {
390361
pinctrl_periphs: pinctrl@4b0 {
391362
compatible = "amlogic,meson-gxbb-periphs-pinctrl";

‎arch/arm64/boot/dts/amlogic/meson-gxl-mali.dtsi

Lines changed: 9 additions & 37 deletions
Original file line numberDiff line numberDiff line change
@@ -4,42 +4,14 @@
44
* Author: Neil Armstrong <[email protected]>
55
*/
66

7-
&apb {
8-
mali: gpu@c0000 {
9-
compatible = "amlogic,meson-gxl-mali", "arm,mali-450";
10-
reg = <0x0 0xc0000 0x0 0x40000>;
11-
interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
12-
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
13-
<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
14-
<GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
15-
<GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
16-
<GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
17-
<GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>,
18-
<GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
19-
<GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
20-
<GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
21-
interrupt-names = "gp", "gpmmu", "pp", "pmu",
22-
"pp0", "ppmmu0", "pp1", "ppmmu1",
23-
"pp2", "ppmmu2";
24-
clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
25-
clock-names = "bus", "core";
7+
#include "meson-gx-mali450.dtsi"
268

27-
/*
28-
* Mali clocking is provided by two identical clock paths
29-
* MALI_0 and MALI_1 muxed to a single clock by a glitch
30-
* free mux to safely change frequency while running.
31-
*/
32-
assigned-clocks = <&clkc CLKID_GP0_PLL>,
33-
<&clkc CLKID_MALI_0_SEL>,
34-
<&clkc CLKID_MALI_0>,
35-
<&clkc CLKID_MALI>; /* Glitch free mux */
36-
assigned-clock-parents = <0>, /* Do Nothing */
37-
<&clkc CLKID_GP0_PLL>,
38-
<0>, /* Do Nothing */
39-
<&clkc CLKID_MALI_0>;
40-
assigned-clock-rates = <744000000>,
41-
<0>, /* Do Nothing */
42-
<744000000>,
43-
<0>; /* Do Nothing */
44-
};
9+
&mali {
10+
compatible = "amlogic,meson-gxl-mali", "arm,mali-450";
11+
12+
clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_MALI>;
13+
clock-names = "bus", "core";
14+
15+
assigned-clocks = <&clkc CLKID_GP0_PLL>;
16+
assigned-clock-rates = <744000000>;
4517
};

‎arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@
1010
#include <dt-bindings/input/input.h>
1111
#include <dt-bindings/sound/meson-aiu.h>
1212

13-
#include "meson-gxl-s905x.dtsi"
13+
#include "meson-gxl-s805x.dtsi"
1414

1515
/ {
1616
compatible = "libretech,aml-s805x-ac", "amlogic,s805x",

‎arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@
99

1010
#include <dt-bindings/input/input.h>
1111

12-
#include "meson-gxl-s905x.dtsi"
12+
#include "meson-gxl-s805x.dtsi"
1313

1414
/ {
1515
compatible = "amlogic,p241", "amlogic,s805x", "amlogic,meson-gxl";

‎arch/arm64/boot/dts/amlogic/meson-gxl-s805x.dtsi

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,23 @@
1+
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2+
/*
3+
* Copyright (c) 2020 BayLibre SAS
4+
* Author: Neil Armstrong <[email protected]>
5+
*/
6+
7+
#include "meson-gxl-s905x.dtsi"
8+
9+
/ {
10+
compatible = "amlogic,s805x", "amlogic,meson-gxl";
11+
};
12+
13+
/* The S805X Package doesn't seem to handle the 744MHz OPP correctly */
14+
&gpu_opp_table {
15+
opp-744000000 {
16+
status = "disabled";
17+
};
18+
};
19+
20+
&mali {
21+
/delete-property/ assigned-clocks;
22+
/delete-property/ assigned-clock-rates;
23+
};

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