@@ -98,22 +98,17 @@ struct rcar_pci_priv {
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void __iomem * reg ;
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struct resource mem_res ;
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struct resource * cfg_res ;
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- unsigned busnr ;
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int irq ;
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- unsigned long window_size ;
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- unsigned long window_addr ;
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- unsigned long window_pci ;
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};
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/* PCI configuration space operations */
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static void __iomem * rcar_pci_cfg_base (struct pci_bus * bus , unsigned int devfn ,
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int where )
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{
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- struct pci_sys_data * sys = bus -> sysdata ;
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- struct rcar_pci_priv * priv = sys -> private_data ;
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+ struct rcar_pci_priv * priv = bus -> sysdata ;
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int slot , val ;
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- if (sys -> busnr != bus -> number || PCI_FUNC (devfn ))
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+ if (! pci_is_root_bus ( bus ) || PCI_FUNC (devfn ))
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return NULL ;
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/* Only one EHCI/OHCI device built-in */
@@ -132,20 +127,6 @@ static void __iomem *rcar_pci_cfg_base(struct pci_bus *bus, unsigned int devfn,
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return priv -> reg + (slot >> 1 ) * 0x100 + where ;
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}
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- /* PCI interrupt mapping */
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- static int rcar_pci_map_irq (const struct pci_dev * dev , u8 slot , u8 pin )
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- {
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- struct pci_sys_data * sys = dev -> bus -> sysdata ;
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- struct rcar_pci_priv * priv = sys -> private_data ;
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- int irq ;
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-
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- irq = of_irq_parse_and_map_pci (dev , slot , pin );
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- if (!irq )
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- irq = priv -> irq ;
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-
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- return irq ;
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- }
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-
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#ifdef CONFIG_PCI_DEBUG
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/* if debug enabled, then attach an error handler irq to the bridge */
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@@ -189,19 +170,33 @@ static inline void rcar_pci_setup_errirq(struct rcar_pci_priv *priv) { }
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#endif
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/* PCI host controller setup */
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- static int rcar_pci_setup (int nr , struct pci_sys_data * sys )
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+ static void rcar_pci_setup (struct rcar_pci_priv * priv )
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{
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- struct rcar_pci_priv * priv = sys -> private_data ;
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+ struct pci_host_bridge * bridge = pci_host_bridge_from_priv ( priv ) ;
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struct device * dev = priv -> dev ;
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void __iomem * reg = priv -> reg ;
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+ struct resource_entry * entry ;
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+ unsigned long window_size ;
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+ unsigned long window_addr ;
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+ unsigned long window_pci ;
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u32 val ;
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- int ret ;
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+
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+ entry = resource_list_first_type (& bridge -> dma_ranges , IORESOURCE_MEM );
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+ if (!entry ) {
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+ window_addr = 0x40000000 ;
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+ window_pci = 0x40000000 ;
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+ window_size = SZ_1G ;
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+ } else {
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+ window_addr = entry -> res -> start ;
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+ window_pci = entry -> res -> start - entry -> offset ;
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+ window_size = resource_size (entry -> res );
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+ }
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pm_runtime_enable (dev );
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pm_runtime_get_sync (dev );
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val = ioread32 (reg + RCAR_PCI_UNIT_REV_REG );
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- dev_info (dev , "PCI: bus%u revision %x\n" , sys -> busnr , val );
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+ dev_info (dev , "PCI: revision %x\n" , val );
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/* Disable Direct Power Down State and assert reset */
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val = ioread32 (reg + RCAR_USBCTR_REG ) & ~RCAR_USBCTR_DIRPD ;
@@ -214,7 +209,7 @@ static int rcar_pci_setup(int nr, struct pci_sys_data *sys)
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RCAR_USBCTR_USBH_RST | RCAR_USBCTR_PLL_RST );
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/* Setup PCIAHB window1 size */
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- switch (priv -> window_size ) {
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+ switch (window_size ) {
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case SZ_2G :
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val |= RCAR_USBCTR_PCIAHB_WIN1_2G ;
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break ;
@@ -226,8 +221,8 @@ static int rcar_pci_setup(int nr, struct pci_sys_data *sys)
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break ;
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default :
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pr_warn ("unknown window size %ld - defaulting to 256M\n" ,
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- priv -> window_size );
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- priv -> window_size = SZ_256M ;
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+ window_size );
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+ window_size = SZ_256M ;
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/* fall-through */
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case SZ_256M :
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val |= RCAR_USBCTR_PCIAHB_WIN1_256M ;
@@ -245,7 +240,7 @@ static int rcar_pci_setup(int nr, struct pci_sys_data *sys)
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iowrite32 (val , reg + RCAR_PCI_ARBITER_CTR_REG );
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/* PCI-AHB mapping */
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- iowrite32 (priv -> window_addr | RCAR_PCIAHB_PREFETCH16 ,
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+ iowrite32 (window_addr | RCAR_PCIAHB_PREFETCH16 ,
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reg + RCAR_PCIAHB_WIN1_CTR_REG );
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/* AHB-PCI mapping: OHCI/EHCI registers */
@@ -256,7 +251,7 @@ static int rcar_pci_setup(int nr, struct pci_sys_data *sys)
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iowrite32 (RCAR_AHBPCI_WIN1_HOST | RCAR_AHBPCI_WIN_CTR_CFG ,
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reg + RCAR_AHBPCI_WIN1_CTR_REG );
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/* Set PCI-AHB Window1 address */
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- iowrite32 (priv -> window_pci | PCI_BASE_ADDRESS_MEM_PREFETCH ,
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+ iowrite32 (window_pci | PCI_BASE_ADDRESS_MEM_PREFETCH ,
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reg + PCI_BASE_ADDRESS_1 );
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/* Set AHB-PCI bridge PCI communication area address */
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val = priv -> cfg_res -> start + RCAR_AHBPCI_PCICOM_OFFSET ;
@@ -271,18 +266,7 @@ static int rcar_pci_setup(int nr, struct pci_sys_data *sys)
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iowrite32 (RCAR_PCI_INT_A | RCAR_PCI_INT_B | RCAR_PCI_INT_PME ,
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reg + RCAR_PCI_INT_ENABLE_REG );
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- if (priv -> irq > 0 )
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- rcar_pci_setup_errirq (priv );
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-
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- /* Add PCI resources */
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- pci_add_resource (& sys -> resources , & priv -> mem_res );
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- ret = devm_request_pci_bus_resources (dev , & sys -> resources );
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- if (ret < 0 )
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- return ret ;
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-
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- /* Setup bus number based on platform device id / of bus-range */
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- sys -> busnr = priv -> busnr ;
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- return 1 ;
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+ rcar_pci_setup_errirq (priv );
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}
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static struct pci_ops rcar_pci_ops = {
@@ -291,55 +275,21 @@ static struct pci_ops rcar_pci_ops = {
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.write = pci_generic_config_write ,
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};
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- static int rcar_pci_parse_map_dma_ranges (struct rcar_pci_priv * pci ,
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- struct device_node * np )
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- {
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- struct device * dev = pci -> dev ;
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- struct of_pci_range range ;
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- struct of_pci_range_parser parser ;
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- int index = 0 ;
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-
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- /* Failure to parse is ok as we fall back to defaults */
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- if (of_pci_dma_range_parser_init (& parser , np ))
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- return 0 ;
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-
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- /* Get the dma-ranges from DT */
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- for_each_of_pci_range (& parser , & range ) {
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- /* Hardware only allows one inbound 32-bit range */
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- if (index )
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- return - EINVAL ;
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-
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- pci -> window_addr = (unsigned long )range .cpu_addr ;
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- pci -> window_pci = (unsigned long )range .pci_addr ;
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- pci -> window_size = (unsigned long )range .size ;
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-
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- /* Catch HW limitations */
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- if (!(range .flags & IORESOURCE_PREFETCH )) {
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- dev_err (dev , "window must be prefetchable\n" );
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- return - EINVAL ;
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- }
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- if (pci -> window_addr ) {
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- u32 lowaddr = 1 << (ffs (pci -> window_addr ) - 1 );
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-
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- if (lowaddr < pci -> window_size ) {
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- dev_err (dev , "invalid window size/addr\n" );
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- return - EINVAL ;
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- }
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- }
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- index ++ ;
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- }
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-
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- return 0 ;
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- }
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-
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static int rcar_pci_probe (struct platform_device * pdev )
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{
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struct device * dev = & pdev -> dev ;
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struct resource * cfg_res , * mem_res ;
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struct rcar_pci_priv * priv ;
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+ struct pci_host_bridge * bridge ;
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void __iomem * reg ;
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- struct hw_pci hw ;
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- void * hw_private [1 ];
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+ int ret ;
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+
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+ bridge = devm_pci_alloc_host_bridge (dev , sizeof (* priv ));
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+ if (!bridge )
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+ return - ENOMEM ;
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+
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+ priv = pci_host_bridge_priv (bridge );
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+ bridge -> sysdata = priv ;
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cfg_res = platform_get_resource (pdev , IORESOURCE_MEM , 0 );
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reg = devm_ioremap_resource (dev , cfg_res );
@@ -353,10 +303,6 @@ static int rcar_pci_probe(struct platform_device *pdev)
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if (mem_res -> start & 0xFFFF )
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return - EINVAL ;
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- priv = devm_kzalloc (dev , sizeof (struct rcar_pci_priv ), GFP_KERNEL );
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- if (!priv )
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- return - ENOMEM ;
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-
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priv -> mem_res = * mem_res ;
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priv -> cfg_res = cfg_res ;
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@@ -369,44 +315,18 @@ static int rcar_pci_probe(struct platform_device *pdev)
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return priv -> irq ;
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}
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- /* default window addr and size if not specified in DT */
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- priv -> window_addr = 0x40000000 ;
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- priv -> window_pci = 0x40000000 ;
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- priv -> window_size = SZ_1G ;
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-
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- if (dev -> of_node ) {
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- struct resource busnr ;
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- int ret ;
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-
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- ret = of_pci_parse_bus_range (dev -> of_node , & busnr );
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- if (ret < 0 ) {
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- dev_err (dev , "failed to parse bus-range\n" );
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- return ret ;
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- }
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-
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- priv -> busnr = busnr .start ;
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- if (busnr .end != busnr .start )
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- dev_warn (dev , "only one bus number supported\n" );
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-
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- ret = rcar_pci_parse_map_dma_ranges (priv , dev -> of_node );
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- if (ret < 0 ) {
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- dev_err (dev , "failed to parse dma-range\n" );
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- return ret ;
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- }
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- } else {
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- priv -> busnr = pdev -> id ;
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- }
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+ ret = pci_parse_request_of_pci_ranges (dev , & bridge -> windows ,
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+ & bridge -> dma_ranges , NULL );
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+ if (ret )
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+ return ret ;
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+
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+ bridge -> ops = & rcar_pci_ops ;
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+
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+ pci_add_flags (PCI_REASSIGN_ALL_BUS );
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+
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+ rcar_pci_setup (priv );
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- hw_private [0 ] = priv ;
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- memset (& hw , 0 , sizeof (hw ));
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- hw .nr_controllers = ARRAY_SIZE (hw_private );
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- hw .io_optional = 1 ;
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- hw .private_data = hw_private ;
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- hw .map_irq = rcar_pci_map_irq ;
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- hw .ops = & rcar_pci_ops ;
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- hw .setup = rcar_pci_setup ;
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- pci_common_init_dev (dev , & hw );
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- return 0 ;
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+ return pci_host_probe (bridge );
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}
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static const struct of_device_id rcar_pci_of_match [] = {
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