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robherringLorenzo Pieralisi
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PCI: rcar-gen2: Convert to use modern host bridge probe functions
The rcar-gen2 host driver still uses the old Arm PCI setup function pci_common_init_dev(). Let's update it to use the modern devm_pci_alloc_host_bridge(), pci_parse_request_of_pci_ranges() and pci_host_probe() functions. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Lorenzo Pieralisi <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> Cc: Marek Vasut <[email protected]> Cc: Yoshihiro Shimoda <[email protected]> Cc: Lorenzo Pieralisi <[email protected]> Cc: Bjorn Helgaas <[email protected]> Cc: [email protected]
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drivers/pci/controller/pci-rcar-gen2.c

Lines changed: 46 additions & 126 deletions
Original file line numberDiff line numberDiff line change
@@ -98,22 +98,17 @@ struct rcar_pci_priv {
9898
void __iomem *reg;
9999
struct resource mem_res;
100100
struct resource *cfg_res;
101-
unsigned busnr;
102101
int irq;
103-
unsigned long window_size;
104-
unsigned long window_addr;
105-
unsigned long window_pci;
106102
};
107103

108104
/* PCI configuration space operations */
109105
static void __iomem *rcar_pci_cfg_base(struct pci_bus *bus, unsigned int devfn,
110106
int where)
111107
{
112-
struct pci_sys_data *sys = bus->sysdata;
113-
struct rcar_pci_priv *priv = sys->private_data;
108+
struct rcar_pci_priv *priv = bus->sysdata;
114109
int slot, val;
115110

116-
if (sys->busnr != bus->number || PCI_FUNC(devfn))
111+
if (!pci_is_root_bus(bus) || PCI_FUNC(devfn))
117112
return NULL;
118113

119114
/* Only one EHCI/OHCI device built-in */
@@ -132,20 +127,6 @@ static void __iomem *rcar_pci_cfg_base(struct pci_bus *bus, unsigned int devfn,
132127
return priv->reg + (slot >> 1) * 0x100 + where;
133128
}
134129

135-
/* PCI interrupt mapping */
136-
static int rcar_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
137-
{
138-
struct pci_sys_data *sys = dev->bus->sysdata;
139-
struct rcar_pci_priv *priv = sys->private_data;
140-
int irq;
141-
142-
irq = of_irq_parse_and_map_pci(dev, slot, pin);
143-
if (!irq)
144-
irq = priv->irq;
145-
146-
return irq;
147-
}
148-
149130
#ifdef CONFIG_PCI_DEBUG
150131
/* if debug enabled, then attach an error handler irq to the bridge */
151132

@@ -189,19 +170,33 @@ static inline void rcar_pci_setup_errirq(struct rcar_pci_priv *priv) { }
189170
#endif
190171

191172
/* PCI host controller setup */
192-
static int rcar_pci_setup(int nr, struct pci_sys_data *sys)
173+
static void rcar_pci_setup(struct rcar_pci_priv *priv)
193174
{
194-
struct rcar_pci_priv *priv = sys->private_data;
175+
struct pci_host_bridge *bridge = pci_host_bridge_from_priv(priv);
195176
struct device *dev = priv->dev;
196177
void __iomem *reg = priv->reg;
178+
struct resource_entry *entry;
179+
unsigned long window_size;
180+
unsigned long window_addr;
181+
unsigned long window_pci;
197182
u32 val;
198-
int ret;
183+
184+
entry = resource_list_first_type(&bridge->dma_ranges, IORESOURCE_MEM);
185+
if (!entry) {
186+
window_addr = 0x40000000;
187+
window_pci = 0x40000000;
188+
window_size = SZ_1G;
189+
} else {
190+
window_addr = entry->res->start;
191+
window_pci = entry->res->start - entry->offset;
192+
window_size = resource_size(entry->res);
193+
}
199194

200195
pm_runtime_enable(dev);
201196
pm_runtime_get_sync(dev);
202197

203198
val = ioread32(reg + RCAR_PCI_UNIT_REV_REG);
204-
dev_info(dev, "PCI: bus%u revision %x\n", sys->busnr, val);
199+
dev_info(dev, "PCI: revision %x\n", val);
205200

206201
/* Disable Direct Power Down State and assert reset */
207202
val = ioread32(reg + RCAR_USBCTR_REG) & ~RCAR_USBCTR_DIRPD;
@@ -214,7 +209,7 @@ static int rcar_pci_setup(int nr, struct pci_sys_data *sys)
214209
RCAR_USBCTR_USBH_RST | RCAR_USBCTR_PLL_RST);
215210

216211
/* Setup PCIAHB window1 size */
217-
switch (priv->window_size) {
212+
switch (window_size) {
218213
case SZ_2G:
219214
val |= RCAR_USBCTR_PCIAHB_WIN1_2G;
220215
break;
@@ -226,8 +221,8 @@ static int rcar_pci_setup(int nr, struct pci_sys_data *sys)
226221
break;
227222
default:
228223
pr_warn("unknown window size %ld - defaulting to 256M\n",
229-
priv->window_size);
230-
priv->window_size = SZ_256M;
224+
window_size);
225+
window_size = SZ_256M;
231226
/* fall-through */
232227
case SZ_256M:
233228
val |= RCAR_USBCTR_PCIAHB_WIN1_256M;
@@ -245,7 +240,7 @@ static int rcar_pci_setup(int nr, struct pci_sys_data *sys)
245240
iowrite32(val, reg + RCAR_PCI_ARBITER_CTR_REG);
246241

247242
/* PCI-AHB mapping */
248-
iowrite32(priv->window_addr | RCAR_PCIAHB_PREFETCH16,
243+
iowrite32(window_addr | RCAR_PCIAHB_PREFETCH16,
249244
reg + RCAR_PCIAHB_WIN1_CTR_REG);
250245

251246
/* AHB-PCI mapping: OHCI/EHCI registers */
@@ -256,7 +251,7 @@ static int rcar_pci_setup(int nr, struct pci_sys_data *sys)
256251
iowrite32(RCAR_AHBPCI_WIN1_HOST | RCAR_AHBPCI_WIN_CTR_CFG,
257252
reg + RCAR_AHBPCI_WIN1_CTR_REG);
258253
/* Set PCI-AHB Window1 address */
259-
iowrite32(priv->window_pci | PCI_BASE_ADDRESS_MEM_PREFETCH,
254+
iowrite32(window_pci | PCI_BASE_ADDRESS_MEM_PREFETCH,
260255
reg + PCI_BASE_ADDRESS_1);
261256
/* Set AHB-PCI bridge PCI communication area address */
262257
val = priv->cfg_res->start + RCAR_AHBPCI_PCICOM_OFFSET;
@@ -271,18 +266,7 @@ static int rcar_pci_setup(int nr, struct pci_sys_data *sys)
271266
iowrite32(RCAR_PCI_INT_A | RCAR_PCI_INT_B | RCAR_PCI_INT_PME,
272267
reg + RCAR_PCI_INT_ENABLE_REG);
273268

274-
if (priv->irq > 0)
275-
rcar_pci_setup_errirq(priv);
276-
277-
/* Add PCI resources */
278-
pci_add_resource(&sys->resources, &priv->mem_res);
279-
ret = devm_request_pci_bus_resources(dev, &sys->resources);
280-
if (ret < 0)
281-
return ret;
282-
283-
/* Setup bus number based on platform device id / of bus-range */
284-
sys->busnr = priv->busnr;
285-
return 1;
269+
rcar_pci_setup_errirq(priv);
286270
}
287271

288272
static struct pci_ops rcar_pci_ops = {
@@ -291,55 +275,21 @@ static struct pci_ops rcar_pci_ops = {
291275
.write = pci_generic_config_write,
292276
};
293277

294-
static int rcar_pci_parse_map_dma_ranges(struct rcar_pci_priv *pci,
295-
struct device_node *np)
296-
{
297-
struct device *dev = pci->dev;
298-
struct of_pci_range range;
299-
struct of_pci_range_parser parser;
300-
int index = 0;
301-
302-
/* Failure to parse is ok as we fall back to defaults */
303-
if (of_pci_dma_range_parser_init(&parser, np))
304-
return 0;
305-
306-
/* Get the dma-ranges from DT */
307-
for_each_of_pci_range(&parser, &range) {
308-
/* Hardware only allows one inbound 32-bit range */
309-
if (index)
310-
return -EINVAL;
311-
312-
pci->window_addr = (unsigned long)range.cpu_addr;
313-
pci->window_pci = (unsigned long)range.pci_addr;
314-
pci->window_size = (unsigned long)range.size;
315-
316-
/* Catch HW limitations */
317-
if (!(range.flags & IORESOURCE_PREFETCH)) {
318-
dev_err(dev, "window must be prefetchable\n");
319-
return -EINVAL;
320-
}
321-
if (pci->window_addr) {
322-
u32 lowaddr = 1 << (ffs(pci->window_addr) - 1);
323-
324-
if (lowaddr < pci->window_size) {
325-
dev_err(dev, "invalid window size/addr\n");
326-
return -EINVAL;
327-
}
328-
}
329-
index++;
330-
}
331-
332-
return 0;
333-
}
334-
335278
static int rcar_pci_probe(struct platform_device *pdev)
336279
{
337280
struct device *dev = &pdev->dev;
338281
struct resource *cfg_res, *mem_res;
339282
struct rcar_pci_priv *priv;
283+
struct pci_host_bridge *bridge;
340284
void __iomem *reg;
341-
struct hw_pci hw;
342-
void *hw_private[1];
285+
int ret;
286+
287+
bridge = devm_pci_alloc_host_bridge(dev, sizeof(*priv));
288+
if (!bridge)
289+
return -ENOMEM;
290+
291+
priv = pci_host_bridge_priv(bridge);
292+
bridge->sysdata = priv;
343293

344294
cfg_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
345295
reg = devm_ioremap_resource(dev, cfg_res);
@@ -353,10 +303,6 @@ static int rcar_pci_probe(struct platform_device *pdev)
353303
if (mem_res->start & 0xFFFF)
354304
return -EINVAL;
355305

356-
priv = devm_kzalloc(dev, sizeof(struct rcar_pci_priv), GFP_KERNEL);
357-
if (!priv)
358-
return -ENOMEM;
359-
360306
priv->mem_res = *mem_res;
361307
priv->cfg_res = cfg_res;
362308

@@ -369,44 +315,18 @@ static int rcar_pci_probe(struct platform_device *pdev)
369315
return priv->irq;
370316
}
371317

372-
/* default window addr and size if not specified in DT */
373-
priv->window_addr = 0x40000000;
374-
priv->window_pci = 0x40000000;
375-
priv->window_size = SZ_1G;
376-
377-
if (dev->of_node) {
378-
struct resource busnr;
379-
int ret;
380-
381-
ret = of_pci_parse_bus_range(dev->of_node, &busnr);
382-
if (ret < 0) {
383-
dev_err(dev, "failed to parse bus-range\n");
384-
return ret;
385-
}
386-
387-
priv->busnr = busnr.start;
388-
if (busnr.end != busnr.start)
389-
dev_warn(dev, "only one bus number supported\n");
390-
391-
ret = rcar_pci_parse_map_dma_ranges(priv, dev->of_node);
392-
if (ret < 0) {
393-
dev_err(dev, "failed to parse dma-range\n");
394-
return ret;
395-
}
396-
} else {
397-
priv->busnr = pdev->id;
398-
}
318+
ret = pci_parse_request_of_pci_ranges(dev, &bridge->windows,
319+
&bridge->dma_ranges, NULL);
320+
if (ret)
321+
return ret;
322+
323+
bridge->ops = &rcar_pci_ops;
324+
325+
pci_add_flags(PCI_REASSIGN_ALL_BUS);
326+
327+
rcar_pci_setup(priv);
399328

400-
hw_private[0] = priv;
401-
memset(&hw, 0, sizeof(hw));
402-
hw.nr_controllers = ARRAY_SIZE(hw_private);
403-
hw.io_optional = 1;
404-
hw.private_data = hw_private;
405-
hw.map_irq = rcar_pci_map_irq;
406-
hw.ops = &rcar_pci_ops;
407-
hw.setup = rcar_pci_setup;
408-
pci_common_init_dev(dev, &hw);
409-
return 0;
329+
return pci_host_probe(bridge);
410330
}
411331

412332
static const struct of_device_id rcar_pci_of_match[] = {

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