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easybemiquelraynal
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mtd: spinand: esmt: Extend IDs to 5 bytes
According to the datasheets, the ESMT chips in question will return a 5 byte long identification code where the last 3 bytes are the JEDEC continuation codes (7Fh). Although, I would have expected 4 continuation codes as Powerchip Semiconductor (C8h, corresponding to the parameter page data) is located in bank 5 of the JEDEC database. By matching the full 5 bytes we can avoid clashes with GigaDevice NAND flashes. This fix allows the MT7688-based GARDENA smart Gateway to boot again. Fixes: aa08bf1 ("mtd: spinand: esmt: add support for F50D2G41KA") Signed-off-by: Ezra Buehler <[email protected]> Reviewed-by: Martin Kurbanov <[email protected]> Tested-by: Martin Kurbanov <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
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drivers/mtd/nand/spi/esmt.c

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -104,7 +104,8 @@ static const struct mtd_ooblayout_ops f50l1g41lb_ooblayout = {
104104

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static const struct spinand_info esmt_c8_spinand_table[] = {
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SPINAND_INFO("F50L1G41LB",
107-
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01),
107+
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01, 0x7f,
108+
0x7f, 0x7f),
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NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
109110
NAND_ECCREQ(1, 512),
110111
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -113,7 +114,8 @@ static const struct spinand_info esmt_c8_spinand_table[] = {
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0,
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SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
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SPINAND_INFO("F50D1G41LB",
116-
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11),
117+
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11, 0x7f,
118+
0x7f, 0x7f),
117119
NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
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NAND_ECCREQ(1, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
@@ -122,7 +124,8 @@ static const struct spinand_info esmt_c8_spinand_table[] = {
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0,
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SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
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SPINAND_INFO("F50D2G41KA",
125-
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x51),
127+
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x51, 0x7f,
128+
0x7f, 0x7f),
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NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,

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