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LuBaolujoergroedel
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iommu/vt-d: Cleanup intel_context_flush_present()
The intel_context_flush_present() is called in places where either the scalable mode is disabled, or scalable mode is enabled but all PASID entries are known to be non-present. In these cases, the flush_domains path within intel_context_flush_present() will never execute. This dead code is therefore removed. Signed-off-by: Lu Baolu <[email protected]> Reviewed-by: Kevin Tian <[email protected]> Tested-by: Zhangfei Gao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Joerg Roedel <[email protected]>
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3 files changed

+10
-38
lines changed

3 files changed

+10
-38
lines changed

drivers/iommu/intel/iommu.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1783,7 +1783,7 @@ static void domain_context_clear_one(struct device_domain_info *info, u8 bus, u8
17831783
context_clear_entry(context);
17841784
__iommu_flush_cache(iommu, context, sizeof(*context));
17851785
spin_unlock(&iommu->lock);
1786-
intel_context_flush_present(info, context, did, true);
1786+
intel_context_flush_no_pasid(info, context, did);
17871787
}
17881788

17891789
int __domain_setup_first_level(struct intel_iommu *iommu,

drivers/iommu/intel/iommu.h

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1286,9 +1286,8 @@ void cache_tag_flush_all(struct dmar_domain *domain);
12861286
void cache_tag_flush_range_np(struct dmar_domain *domain, unsigned long start,
12871287
unsigned long end);
12881288

1289-
void intel_context_flush_present(struct device_domain_info *info,
1290-
struct context_entry *context,
1291-
u16 did, bool affect_domains);
1289+
void intel_context_flush_no_pasid(struct device_domain_info *info,
1290+
struct context_entry *context, u16 did);
12921291

12931292
int intel_iommu_enable_prq(struct intel_iommu *iommu);
12941293
int intel_iommu_finish_prq(struct intel_iommu *iommu);

drivers/iommu/intel/pasid.c

Lines changed: 7 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -932,7 +932,7 @@ static void device_pasid_table_teardown(struct device *dev, u8 bus, u8 devfn)
932932
context_clear_entry(context);
933933
__iommu_flush_cache(iommu, context, sizeof(*context));
934934
spin_unlock(&iommu->lock);
935-
intel_context_flush_present(info, context, did, false);
935+
intel_context_flush_no_pasid(info, context, did);
936936
}
937937

938938
static int pci_pasid_table_teardown(struct pci_dev *pdev, u16 alias, void *data)
@@ -1119,17 +1119,15 @@ static void __context_flush_dev_iotlb(struct device_domain_info *info)
11191119

11201120
/*
11211121
* Cache invalidations after change in a context table entry that was present
1122-
* according to the Spec 6.5.3.3 (Guidance to Software for Invalidations). If
1123-
* IOMMU is in scalable mode and all PASID table entries of the device were
1124-
* non-present, set flush_domains to false. Otherwise, true.
1122+
* according to the Spec 6.5.3.3 (Guidance to Software for Invalidations).
1123+
* This helper can only be used when IOMMU is working in the legacy mode or
1124+
* IOMMU is in scalable mode but all PASID table entries of the device are
1125+
* non-present.
11251126
*/
1126-
void intel_context_flush_present(struct device_domain_info *info,
1127-
struct context_entry *context,
1128-
u16 did, bool flush_domains)
1127+
void intel_context_flush_no_pasid(struct device_domain_info *info,
1128+
struct context_entry *context, u16 did)
11291129
{
11301130
struct intel_iommu *iommu = info->iommu;
1131-
struct pasid_entry *pte;
1132-
int i;
11331131

11341132
/*
11351133
* Device-selective context-cache invalidation. The Domain-ID field
@@ -1152,30 +1150,5 @@ void intel_context_flush_present(struct device_domain_info *info,
11521150
return;
11531151
}
11541152

1155-
/*
1156-
* For scalable mode:
1157-
* - Domain-selective PASID-cache invalidation to affected domains
1158-
* - Domain-selective IOTLB invalidation to affected domains
1159-
* - Global Device-TLB invalidation to affected functions
1160-
*/
1161-
if (flush_domains) {
1162-
/*
1163-
* If the IOMMU is running in scalable mode and there might
1164-
* be potential PASID translations, the caller should hold
1165-
* the lock to ensure that context changes and cache flushes
1166-
* are atomic.
1167-
*/
1168-
assert_spin_locked(&iommu->lock);
1169-
for (i = 0; i < info->pasid_table->max_pasid; i++) {
1170-
pte = intel_pasid_get_entry(info->dev, i);
1171-
if (!pte || !pasid_pte_is_present(pte))
1172-
continue;
1173-
1174-
did = pasid_get_domain_id(pte);
1175-
qi_flush_pasid_cache(iommu, did, QI_PC_ALL_PASIDS, 0);
1176-
iommu->flush.flush_iotlb(iommu, did, 0, 0, DMA_TLB_DSI_FLUSH);
1177-
}
1178-
}
1179-
11801153
__context_flush_dev_iotlb(info);
11811154
}

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