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amlutoPeter Zijlstra
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x86/entry/32: Use %ss segment where required
When re-building the IRET frame we use %eax as an destination %esp, make sure to then also match the segment for when there is a nonzero SS base (ESPFIX). [peterz: Changelog and minor edits] Fixes: 3c88c69 ("x86/stackframe/32: Provide consistent pt_regs") Signed-off-by: Andy Lutomirski <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Cc: [email protected]
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arch/x86/entry/entry_32.S

Lines changed: 14 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -210,6 +210,8 @@
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/*
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* The high bits of the CS dword (__csh) are used for CS_FROM_*.
212212
* Clear them in case hardware didn't do this for us.
213+
*
214+
* Be careful: we may have nonzero SS base due to ESPFIX.
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*/
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andl $0x0000ffff, 3*4(%esp)
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@@ -263,6 +265,13 @@
263265
.endm
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265267
.macro IRET_FRAME
268+
/*
269+
* We're called with %ds, %es, %fs, and %gs from the interrupted
270+
* frame, so we shouldn't use them. Also, we may be in ESPFIX
271+
* mode and therefore have a nonzero SS base and an offset ESP,
272+
* so any attempt to access the stack needs to use SS. (except for
273+
* accesses through %esp, which automatically use SS.)
274+
*/
266275
testl $CS_FROM_KERNEL, 1*4(%esp)
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jz .Lfinished_frame_\@
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@@ -276,20 +285,20 @@
276285
movl 5*4(%esp), %eax # (modified) regs->sp
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278287
movl 4*4(%esp), %ecx # flags
279-
movl %ecx, -4(%eax)
288+
movl %ecx, %ss:-1*4(%eax)
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281290
movl 3*4(%esp), %ecx # cs
282291
andl $0x0000ffff, %ecx
283-
movl %ecx, -8(%eax)
292+
movl %ecx, %ss:-2*4(%eax)
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285294
movl 2*4(%esp), %ecx # ip
286-
movl %ecx, -12(%eax)
295+
movl %ecx, %ss:-3*4(%eax)
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288297
movl 1*4(%esp), %ecx # eax
289-
movl %ecx, -16(%eax)
298+
movl %ecx, %ss:-4*4(%eax)
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291300
popl %ecx
292-
lea -16(%eax), %esp
301+
lea -4*4(%eax), %esp
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popl %eax
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.Lfinished_frame_\@:
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.endm

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