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Merge tag 'tegra-for-5.8-arm64-dt-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.8-rc1 This contains a couple of fixes for minor issues, enables XUDC support on Tegra194, and enables EMC frequency scaling and video capture on Tegra210. * tag 'tegra-for-5.8-arm64-dt-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Make the RTC a wakeup source on Jetson Nano and TX1 arm64: tegra: Make the RTC a wakeup source on Jetson TX2 arm64: tegra: Enable VI I2C on Jetson Nano arm64: tegra: Fix flag for 64-bit resources in 'ranges' property arm64: tegra: Add Tegra VI CSI support in device tree arm64: tegra: Add reset-cells to memory controller arm64: tegra: Fix SOR powergate clocks and reset arm64: tegra: Allow the PMIC RTC to wakeup Jetson Xavier arm64: tegra: Fix ethernet phy-mode for Jetson Xavier arm64: tegra: Hook up EMC cooling device arm64: tegra: Add external memory controller node for Tegra210 arm64: tegra: Add XUDC node on Tegra194 arm64: tegra: Kill off "simple-panel" compatibles Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
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‎arch/arm64/boot/dts/nvidia/tegra132-norrin.dts

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -990,7 +990,7 @@
990990
};
991991

992992
panel: panel {
993-
compatible = "innolux,n116bge", "simple-panel";
993+
compatible = "innolux,n116bge";
994994
backlight = <&backlight>;
995995
ddc-i2c-bus = <&dpaux>;
996996
};

‎arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -221,7 +221,8 @@
221221
compatible = "maxim,max77620";
222222
reg = <0x3c>;
223223

224-
interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
224+
interrupt-parent = <&pmc>;
225+
interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
225226
#interrupt-cells = <2>;
226227
interrupt-controller;
227228

‎arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,7 @@
3333

3434
phy-reset-gpios = <&gpio TEGRA194_MAIN_GPIO(G, 5) GPIO_ACTIVE_LOW>;
3535
phy-handle = <&phy>;
36-
phy-mode = "rgmii";
36+
phy-mode = "rgmii-id";
3737

3838
mdio {
3939
#address-cells = <1>;
@@ -111,7 +111,8 @@
111111
compatible = "maxim,max20024";
112112
reg = <0x3c>;
113113

114-
interrupts = <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
114+
interrupt-parent = <&pmc>;
115+
interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
115116
#interrupt-cells = <2>;
116117
interrupt-controller;
117118

‎arch/arm64/boot/dts/nvidia/tegra194.dtsi

Lines changed: 24 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -644,6 +644,24 @@
644644
};
645645
};
646646

647+
usb@3550000 {
648+
compatible = "nvidia,tegra194-xudc";
649+
reg = <0x03550000 0x8000>,
650+
<0x03558000 0x1000>;
651+
reg-names = "base", "fpci";
652+
interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
653+
clocks = <&bpmp TEGRA194_CLK_XUSB_CORE_DEV>,
654+
<&bpmp TEGRA194_CLK_XUSB_CORE_SS>,
655+
<&bpmp TEGRA194_CLK_XUSB_SS>,
656+
<&bpmp TEGRA194_CLK_XUSB_FS>;
657+
clock-names = "dev", "ss", "ss_src", "fs_src";
658+
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_XUSBB>,
659+
<&bpmp TEGRA194_POWER_DOMAIN_XUSBA>;
660+
power-domain-names = "dev", "ss";
661+
nvidia,xusb-padctl = <&xusb_padctl>;
662+
status = "disabled";
663+
};
664+
647665
usb@3610000 {
648666
compatible = "nvidia,tegra194-xusb";
649667
reg = <0x03610000 0x40000>,
@@ -1387,7 +1405,7 @@
13871405

13881406
bus-range = <0x0 0xff>;
13891407
ranges = <0x81000000 0x0 0x30100000 0x0 0x30100000 0x0 0x00100000 /* downstream I/O (1MB) */
1390-
0xc2000000 0x12 0x00000000 0x12 0x00000000 0x0 0x30000000 /* prefetchable memory (768MB) */
1408+
0xc3000000 0x12 0x00000000 0x12 0x00000000 0x0 0x30000000 /* prefetchable memory (768MB) */
13911409
0x82000000 0x0 0x40000000 0x12 0x30000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */
13921410
};
13931411

@@ -1432,7 +1450,7 @@
14321450

14331451
bus-range = <0x0 0xff>;
14341452
ranges = <0x81000000 0x0 0x32100000 0x0 0x32100000 0x0 0x00100000 /* downstream I/O (1MB) */
1435-
0xc2000000 0x12 0x40000000 0x12 0x40000000 0x0 0x30000000 /* prefetchable memory (768MB) */
1453+
0xc3000000 0x12 0x40000000 0x12 0x40000000 0x0 0x30000000 /* prefetchable memory (768MB) */
14361454
0x82000000 0x0 0x40000000 0x12 0x70000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */
14371455
};
14381456

@@ -1477,7 +1495,7 @@
14771495

14781496
bus-range = <0x0 0xff>;
14791497
ranges = <0x81000000 0x0 0x34100000 0x0 0x34100000 0x0 0x00100000 /* downstream I/O (1MB) */
1480-
0xc2000000 0x12 0x80000000 0x12 0x80000000 0x0 0x30000000 /* prefetchable memory (768MB) */
1498+
0xc3000000 0x12 0x80000000 0x12 0x80000000 0x0 0x30000000 /* prefetchable memory (768MB) */
14811499
0x82000000 0x0 0x40000000 0x12 0xb0000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */
14821500
};
14831501

@@ -1522,7 +1540,7 @@
15221540

15231541
bus-range = <0x0 0xff>;
15241542
ranges = <0x81000000 0x0 0x36100000 0x0 0x36100000 0x0 0x00100000 /* downstream I/O (1MB) */
1525-
0xc2000000 0x14 0x00000000 0x14 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */
1543+
0xc3000000 0x14 0x00000000 0x14 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */
15261544
0x82000000 0x0 0x40000000 0x17 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */
15271545
};
15281546

@@ -1567,7 +1585,7 @@
15671585

15681586
bus-range = <0x0 0xff>;
15691587
ranges = <0x81000000 0x0 0x38100000 0x0 0x38100000 0x0 0x00100000 /* downstream I/O (1MB) */
1570-
0xc2000000 0x18 0x00000000 0x18 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */
1588+
0xc3000000 0x18 0x00000000 0x18 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */
15711589
0x82000000 0x0 0x40000000 0x1b 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */
15721590
};
15731591

@@ -1616,7 +1634,7 @@
16161634

16171635
bus-range = <0x0 0xff>;
16181636
ranges = <0x81000000 0x0 0x3a100000 0x0 0x3a100000 0x0 0x00100000 /* downstream I/O (1MB) */
1619-
0xc2000000 0x1c 0x00000000 0x1c 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */
1637+
0xc3000000 0x1c 0x00000000 0x1c 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */
16201638
0x82000000 0x0 0x40000000 0x1f 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */
16211639
};
16221640

‎arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,8 @@
3838
pmic: pmic@3c {
3939
compatible = "maxim,max77620";
4040
reg = <0x3c>;
41-
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
41+
interrupt-parent = <&tegra_pmc>;
42+
interrupts = <51 IRQ_TYPE_LEVEL_LOW>;
4243

4344
#interrupt-cells = <2>;
4445
interrupt-controller;

‎arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,16 @@
1414
status = "okay";
1515
};
1616

17+
vi@54080000 {
18+
status = "okay";
19+
20+
avdd-dsi-csi-supply = <&vdd_dsi_csi>;
21+
22+
csi@838 {
23+
status = "okay";
24+
};
25+
};
26+
1727
sor@54580000 {
1828
status = "okay";
1929

‎arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -90,6 +90,10 @@
9090
dpaux@545c0000 {
9191
status = "okay";
9292
};
93+
94+
i2c@546c0000 {
95+
status = "okay";
96+
};
9397
};
9498

9599
gpu@57000000 {
@@ -145,7 +149,8 @@
145149
pmic: pmic@3c {
146150
compatible = "maxim,max77620";
147151
reg = <0x3c>;
148-
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
152+
interrupt-parent = <&tegra_pmc>;
153+
interrupts = <51 IRQ_TYPE_LEVEL_LOW>;
149154

150155
#interrupt-cells = <2>;
151156
interrupt-controller;

‎arch/arm64/boot/dts/nvidia/tegra210.dtsi

Lines changed: 82 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -137,9 +137,44 @@
137137

138138
vi@54080000 {
139139
compatible = "nvidia,tegra210-vi";
140-
reg = <0x0 0x54080000 0x0 0x00040000>;
140+
reg = <0x0 0x54080000 0x0 0x700>;
141141
interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
142142
status = "disabled";
143+
assigned-clocks = <&tegra_car TEGRA210_CLK_VI>;
144+
assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>;
145+
146+
clocks = <&tegra_car TEGRA210_CLK_VI>;
147+
power-domains = <&pd_venc>;
148+
149+
#address-cells = <1>;
150+
#size-cells = <1>;
151+
152+
ranges = <0x0 0x0 0x54080000 0x2000>;
153+
154+
csi@838 {
155+
compatible = "nvidia,tegra210-csi";
156+
reg = <0x838 0x1300>;
157+
status = "disabled";
158+
assigned-clocks = <&tegra_car TEGRA210_CLK_CILAB>,
159+
<&tegra_car TEGRA210_CLK_CILCD>,
160+
<&tegra_car TEGRA210_CLK_CILE>,
161+
<&tegra_car TEGRA210_CLK_CSI_TPG>;
162+
assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_P>,
163+
<&tegra_car TEGRA210_CLK_PLL_P>,
164+
<&tegra_car TEGRA210_CLK_PLL_P>;
165+
assigned-clock-rates = <102000000>,
166+
<102000000>,
167+
<102000000>,
168+
<972000000>;
169+
170+
clocks = <&tegra_car TEGRA210_CLK_CSI>,
171+
<&tegra_car TEGRA210_CLK_CILAB>,
172+
<&tegra_car TEGRA210_CLK_CILCD>,
173+
<&tegra_car TEGRA210_CLK_CILE>,
174+
<&tegra_car TEGRA210_CLK_CSI_TPG>;
175+
clock-names = "csi", "cilab", "cilcd", "cile", "csi_tpg";
176+
power-domains = <&pd_sor>;
177+
};
143178
};
144179

145180
tsec@54100000 {
@@ -796,15 +831,16 @@
796831
pd_sor: sor {
797832
clocks = <&tegra_car TEGRA210_CLK_SOR0>,
798833
<&tegra_car TEGRA210_CLK_SOR1>,
799-
<&tegra_car TEGRA210_CLK_CSI>,
834+
<&tegra_car TEGRA210_CLK_CILAB>,
835+
<&tegra_car TEGRA210_CLK_CILCD>,
836+
<&tegra_car TEGRA210_CLK_CILE>,
800837
<&tegra_car TEGRA210_CLK_DSIA>,
801838
<&tegra_car TEGRA210_CLK_DSIB>,
802839
<&tegra_car TEGRA210_CLK_DPAUX>,
803840
<&tegra_car TEGRA210_CLK_DPAUX1>,
804841
<&tegra_car TEGRA210_CLK_MIPI_CAL>;
805842
resets = <&tegra_car TEGRA210_CLK_SOR0>,
806843
<&tegra_car TEGRA210_CLK_SOR1>,
807-
<&tegra_car TEGRA210_CLK_CSI>,
808844
<&tegra_car TEGRA210_CLK_DSIA>,
809845
<&tegra_car TEGRA210_CLK_DSIB>,
810846
<&tegra_car TEGRA210_CLK_DPAUX>,
@@ -838,6 +874,15 @@
838874
reset-names = "vic";
839875
#power-domain-cells = <0>;
840876
};
877+
878+
pd_venc: venc {
879+
clocks = <&tegra_car TEGRA210_CLK_VI>,
880+
<&tegra_car TEGRA210_CLK_CSI>;
881+
resets = <&mc TEGRA210_MC_RESET_VI>,
882+
<&tegra_car 20>,
883+
<&tegra_car 52>;
884+
#power-domain-cells = <0>;
885+
};
841886
};
842887

843888
sdmmc1_3v3: sdmmc1-3v3 {
@@ -893,6 +938,19 @@
893938
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
894939

895940
#iommu-cells = <1>;
941+
#reset-cells = <1>;
942+
};
943+
944+
emc: external-memory-controller@7001b000 {
945+
compatible = "nvidia,tegra210-emc";
946+
reg = <0x0 0x7001b000 0x0 0x1000>,
947+
<0x0 0x7001e000 0x0 0x1000>,
948+
<0x0 0x7001f000 0x0 0x1000>;
949+
clocks = <&tegra_car TEGRA210_CLK_EMC>;
950+
clock-names = "emc";
951+
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
952+
nvidia,memory-controller = <&mc>;
953+
#cooling-cells = <2>;
896954
};
897955

898956
sata@70020000 {
@@ -1550,6 +1608,18 @@
15501608
<&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>;
15511609

15521610
trips {
1611+
dram_nominal: mem-nominal-trip {
1612+
temperature = <50000>;
1613+
hysteresis = <1000>;
1614+
type = "passive";
1615+
};
1616+
1617+
dram_throttle: mem-throttle-trip {
1618+
temperature = <70000>;
1619+
hysteresis = <1000>;
1620+
type = "active";
1621+
};
1622+
15531623
mem-shutdown-trip {
15541624
temperature = <103000>;
15551625
hysteresis = <0>;
@@ -1558,10 +1628,15 @@
15581628
};
15591629

15601630
cooling-maps {
1561-
/*
1562-
* There are currently no cooling maps,
1563-
* because there are no cooling devices.
1564-
*/
1631+
dram-passive {
1632+
cooling-device = <&emc 0 0>;
1633+
trip = <&dram_nominal>;
1634+
};
1635+
1636+
dram-active {
1637+
cooling-device = <&emc 1 1>;
1638+
trip = <&dram_throttle>;
1639+
};
15651640
};
15661641
};
15671642

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