Skip to content

Commit 4d3421e

Browse files
nirmoyAndi Shyti
authored andcommitted
drm/i915: Fix gt reset with GuC submission is disabled
Currently intel_gt_reset() kills the GuC and then resets requested engines. This is problematic because there is a dedicated CSB FIFO which only GuC can access and if that FIFO fills up, the hardware will block on the next context switch until there is space that means the system is effectively hung. If an engine is reset whilst actively executing a context, a CSB entry will be sent to say that the context has gone idle. Thus if reset happens on a very busy system then killing GuC before killing the engines will lead to deadlock because of filled up CSB FIFO. To address this issue, the GuC should be killed only after resetting the requested engines and before calling intel_gt_init_hw(). v2: Improve commit message(John) Cc: John Harrison <[email protected]> Signed-off-by: Nirmoy Das <[email protected]> Reviewed-by: John Harrison <[email protected]> Reviewed-by: Andi Shyti <[email protected]> Signed-off-by: Andi Shyti <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
1 parent 31c3c53 commit 4d3421e

File tree

1 file changed

+14
-2
lines changed

1 file changed

+14
-2
lines changed

drivers/gpu/drm/i915/gt/intel_reset.c

Lines changed: 14 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -879,8 +879,17 @@ static intel_engine_mask_t reset_prepare(struct intel_gt *gt)
879879
intel_engine_mask_t awake = 0;
880880
enum intel_engine_id id;
881881

882-
/* For GuC mode, ensure submission is disabled before stopping ring */
883-
intel_uc_reset_prepare(&gt->uc);
882+
/**
883+
* For GuC mode with submission enabled, ensure submission
884+
* is disabled before stopping ring.
885+
*
886+
* For GuC mode with submission disabled, ensure that GuC is not
887+
* sanitized, do that after engine reset. reset_prepare()
888+
* is followed by engine reset which in this mode requires GuC to
889+
* process any CSB FIFO entries generated by the resets.
890+
*/
891+
if (intel_uc_uses_guc_submission(&gt->uc))
892+
intel_uc_reset_prepare(&gt->uc);
884893

885894
for_each_engine(engine, gt, id) {
886895
if (intel_engine_pm_get_if_awake(engine))
@@ -1226,6 +1235,9 @@ void intel_gt_reset(struct intel_gt *gt,
12261235

12271236
intel_overlay_reset(gt->i915);
12281237

1238+
/* sanitize uC after engine reset */
1239+
if (!intel_uc_uses_guc_submission(&gt->uc))
1240+
intel_uc_reset_prepare(&gt->uc);
12291241
/*
12301242
* Next we need to restore the context, but we don't use those
12311243
* yet either...

0 commit comments

Comments
 (0)