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Arseniy Krasnovmiquelraynal
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dt-bindings: mtd: amlogic,meson-nand: support fields for boot ROM code
Boot ROM code on Meson requires that some pages on NAND must be written in special mode: "short" ECC mode where each block is 384 bytes and scrambling mode is on. Such pages are located on the chip in the following way (for example): [ p0 ][ p1 ][ p2 ][ p3 ][ p4 ][ p5 ][ p6 ][ p7 ] ... [ pN ] ^ ^ ^ ^ pX is page number "X". "^" means "special" page used by boot ROM - e.g. every 2nd page in the range of [0, 7]. Step (2 in example is set by 'amlogic,boot-page-step' field. Last page in range (7 in example) is set by 'amlogic,boot-pages' field. Signed-off-by: Arseniy Krasnov <[email protected]> Reviewed-by: Rob Herring (Arm) <[email protected]> Signed-off-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/linux-mtd/[email protected]
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Documentation/devicetree/bindings/mtd/amlogic,meson-nand.yaml

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@@ -64,11 +64,29 @@ patternProperties:
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items:
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maximum: 0
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amlogic,boot-pages:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Number of pages starting from offset 0, where a special ECC
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configuration must be used because it is accessed by the ROM
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code. This ECC configuration uses 384 bytes data blocks.
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Also scrambling mode is enabled for such pages.
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amlogic,boot-page-step:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Interval between pages, accessed by the ROM code. For example
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we have 8 pages [0, 7]. Pages 0,2,4,6 are accessed by the
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ROM code, so this field will be 2 (e.g. every 2nd page). Rest
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of pages - 1,3,5,7 are read/written without this mode.
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unevaluatedProperties: false
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dependencies:
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nand-ecc-strength: [nand-ecc-step-size]
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nand-ecc-step-size: [nand-ecc-strength]
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amlogic,boot-pages: [nand-is-boot-medium, "amlogic,boot-page-step"]
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amlogic,boot-page-step: [nand-is-boot-medium, "amlogic,boot-pages"]
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required:

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