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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_dma.h>
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+ #include <linux/pinctrl/consumer.h>
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#include <linux/serial_core.h>
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#include <linux/slab.h>
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#include <linux/tty_flip.h>
@@ -1627,10 +1628,23 @@ static void lpuart_rx_dma_startup(struct lpuart_port *sport)
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sport -> lpuart_dma_rx_use = false;
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}
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+ static void lpuart_hw_setup (struct lpuart_port * sport )
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+ {
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+ unsigned long flags ;
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+
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+ spin_lock_irqsave (& sport -> port .lock , flags );
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+
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+ lpuart_setup_watermark_enable (sport );
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+
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+ lpuart_rx_dma_startup (sport );
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+ lpuart_tx_dma_startup (sport );
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+
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+ spin_unlock_irqrestore (& sport -> port .lock , flags );
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+ }
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+
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static int lpuart_startup (struct uart_port * port )
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{
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struct lpuart_port * sport = container_of (port , struct lpuart_port , port );
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- unsigned long flags ;
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unsigned char temp ;
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/* determine FIFO size and enable FIFO mode */
@@ -1644,15 +1658,7 @@ static int lpuart_startup(struct uart_port *port)
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UARTPFIFO_FIFOSIZE_MASK );
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lpuart_request_dma (sport );
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-
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- spin_lock_irqsave (& sport -> port .lock , flags );
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-
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- lpuart_setup_watermark_enable (sport );
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-
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- lpuart_rx_dma_startup (sport );
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- lpuart_tx_dma_startup (sport );
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-
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- spin_unlock_irqrestore (& sport -> port .lock , flags );
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+ lpuart_hw_setup (sport );
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return 0 ;
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}
@@ -1675,10 +1681,25 @@ static void lpuart32_configure(struct lpuart_port *sport)
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lpuart32_write (& sport -> port , temp , UARTCTRL );
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}
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+ static void lpuart32_hw_setup (struct lpuart_port * sport )
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+ {
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+ unsigned long flags ;
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+
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+ spin_lock_irqsave (& sport -> port .lock , flags );
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+
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+ lpuart32_setup_watermark_enable (sport );
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+
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+ lpuart_rx_dma_startup (sport );
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+ lpuart_tx_dma_startup (sport );
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+
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+ lpuart32_configure (sport );
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+
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+ spin_unlock_irqrestore (& sport -> port .lock , flags );
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+ }
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+
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static int lpuart32_startup (struct uart_port * port )
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{
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struct lpuart_port * sport = container_of (port , struct lpuart_port , port );
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- unsigned long flags ;
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unsigned long temp ;
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/* determine FIFO size */
@@ -1703,17 +1724,8 @@ static int lpuart32_startup(struct uart_port *port)
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}
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lpuart_request_dma (sport );
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+ lpuart32_hw_setup (sport );
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- spin_lock_irqsave (& sport -> port .lock , flags );
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-
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- lpuart32_setup_watermark_enable (sport );
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-
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- lpuart_rx_dma_startup (sport );
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- lpuart_tx_dma_startup (sport );
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-
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- lpuart32_configure (sport );
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-
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- spin_unlock_irqrestore (& sport -> port .lock , flags );
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return 0 ;
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}
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@@ -2766,97 +2778,204 @@ static int lpuart_remove(struct platform_device *pdev)
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return 0 ;
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}
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- static int __maybe_unused lpuart_suspend (struct device * dev )
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+ static void serial_lpuart_enable_wakeup (struct lpuart_port * sport , bool on )
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{
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- struct lpuart_port * sport = dev_get_drvdata (dev );
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- unsigned long temp ;
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- bool irq_wake ;
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+ unsigned int val , baud ;
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if (lpuart_is_32 (sport )) {
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- /* disable Rx/Tx and interrupts */
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- temp = lpuart32_read (& sport -> port , UARTCTRL );
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- temp &= ~(UARTCTRL_TE | UARTCTRL_TIE | UARTCTRL_TCIE );
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- lpuart32_write (& sport -> port , temp , UARTCTRL );
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+ val = lpuart32_read (& sport -> port , UARTCTRL );
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+ baud = lpuart32_read (& sport -> port , UARTBAUD );
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+ if (on ) {
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+ /* set rx_watermark to 0 in wakeup source mode */
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+ lpuart32_write (& sport -> port , 0 , UARTWATER );
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+ val |= UARTCTRL_RIE ;
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+ /* clear RXEDGIF flag before enable RXEDGIE interrupt */
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+ lpuart32_write (& sport -> port , UARTSTAT_RXEDGIF , UARTSTAT );
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+ baud |= UARTBAUD_RXEDGIE ;
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+ } else {
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+ val &= ~UARTCTRL_RIE ;
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+ baud &= ~UARTBAUD_RXEDGIE ;
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+ }
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+ lpuart32_write (& sport -> port , val , UARTCTRL );
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+ lpuart32_write (& sport -> port , baud , UARTBAUD );
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} else {
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- /* disable Rx/Tx and interrupts */
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- temp = readb (sport -> port .membase + UARTCR2 );
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- temp &= ~(UARTCR2_TE | UARTCR2_TIE | UARTCR2_TCIE );
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- writeb (temp , sport -> port .membase + UARTCR2 );
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+ val = readb (sport -> port .membase + UARTCR2 );
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+ if (on )
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+ val |= UARTCR2_RIE ;
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+ else
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+ val &= ~UARTCR2_RIE ;
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+ writeb (val , sport -> port .membase + UARTCR2 );
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}
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+ }
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- uart_suspend_port (& lpuart_reg , & sport -> port );
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+ static bool lpuart_uport_is_active (struct lpuart_port * sport )
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+ {
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+ struct tty_port * port = & sport -> port .state -> port ;
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+ struct tty_struct * tty ;
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+ struct device * tty_dev ;
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+ int may_wake = 0 ;
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- /* uart_suspend_port() might set wakeup flag */
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- irq_wake = irqd_is_wakeup_set (irq_get_irq_data (sport -> port .irq ));
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+ tty = tty_port_tty_get (port );
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+ if (tty ) {
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+ tty_dev = tty -> dev ;
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+ may_wake = device_may_wakeup (tty_dev );
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+ tty_kref_put (tty );
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+ }
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- if (sport -> lpuart_dma_rx_use ) {
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- /*
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- * EDMA driver during suspend will forcefully release any
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- * non-idle DMA channels. If port wakeup is enabled or if port
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- * is console port or 'no_console_suspend' is set the Rx DMA
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- * cannot resume as expected, hence gracefully release the
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- * Rx DMA path before suspend and start Rx DMA path on resume.
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- */
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- if (irq_wake ) {
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- del_timer_sync (& sport -> lpuart_timer );
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- lpuart_dma_rx_free (& sport -> port );
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- }
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+ if ((tty_port_initialized (port ) && may_wake ) ||
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+ (!console_suspend_enabled && uart_console (& sport -> port )))
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+ return true;
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+
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+ return false;
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+ }
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+
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+ static int __maybe_unused lpuart_suspend_noirq (struct device * dev )
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+ {
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+ struct lpuart_port * sport = dev_get_drvdata (dev );
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+ bool irq_wake = irqd_is_wakeup_set (irq_get_irq_data (sport -> port .irq ));
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+
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+ if (lpuart_uport_is_active (sport ))
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+ serial_lpuart_enable_wakeup (sport , !!irq_wake );
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+
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+ pinctrl_pm_select_sleep_state (dev );
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+
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+ return 0 ;
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+ }
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+
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+ static int __maybe_unused lpuart_resume_noirq (struct device * dev )
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+ {
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+ struct lpuart_port * sport = dev_get_drvdata (dev );
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+ unsigned int val ;
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+
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+ pinctrl_pm_select_default_state (dev );
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+
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+ if (lpuart_uport_is_active (sport )) {
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+ serial_lpuart_enable_wakeup (sport , false);
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- /* Disable Rx DMA to use UART port as wakeup source */
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+ /* clear the wakeup flags */
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if (lpuart_is_32 (sport )) {
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- temp = lpuart32_read (& sport -> port , UARTBAUD );
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- lpuart32_write (& sport -> port , temp & ~UARTBAUD_RDMAE ,
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- UARTBAUD );
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- } else {
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- writeb (readb (sport -> port .membase + UARTCR5 ) &
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- ~UARTCR5_RDMAS , sport -> port .membase + UARTCR5 );
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+ val = lpuart32_read (& sport -> port , UARTSTAT );
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+ lpuart32_write (& sport -> port , val , UARTSTAT );
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}
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}
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- if (sport -> lpuart_dma_tx_use ) {
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- sport -> dma_tx_in_progress = false;
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- dmaengine_terminate_all (sport -> dma_tx_chan );
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- }
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-
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- if (sport -> port .suspended && !irq_wake )
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- lpuart_disable_clks (sport );
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-
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return 0 ;
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}
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- static int __maybe_unused lpuart_resume (struct device * dev )
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+ static int __maybe_unused lpuart_suspend (struct device * dev )
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{
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struct lpuart_port * sport = dev_get_drvdata (dev );
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- bool irq_wake = irqd_is_wakeup_set ( irq_get_irq_data ( sport -> port . irq )) ;
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+ unsigned long temp , flags ;
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- if (sport -> port .suspended && !irq_wake )
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- lpuart_enable_clks (sport );
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+ uart_suspend_port (& lpuart_reg , & sport -> port );
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- if (lpuart_is_32 (sport ))
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- lpuart32_setup_watermark_enable (sport );
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- else
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- lpuart_setup_watermark_enable (sport );
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+ if (lpuart_uport_is_active (sport )) {
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+ spin_lock_irqsave (& sport -> port .lock , flags );
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+ if (lpuart_is_32 (sport )) {
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+ /* disable Rx/Tx and interrupts */
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+ temp = lpuart32_read (& sport -> port , UARTCTRL );
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+ temp &= ~(UARTCTRL_TE | UARTCTRL_TIE | UARTCTRL_TCIE );
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+ lpuart32_write (& sport -> port , temp , UARTCTRL );
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+ } else {
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+ /* disable Rx/Tx and interrupts */
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+ temp = readb (sport -> port .membase + UARTCR2 );
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+ temp &= ~(UARTCR2_TE | UARTCR2_TIE | UARTCR2_TCIE );
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+ writeb (temp , sport -> port .membase + UARTCR2 );
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+ }
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+ spin_unlock_irqrestore (& sport -> port .lock , flags );
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- if (sport -> lpuart_dma_rx_use ) {
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- if (irq_wake ) {
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- if (!lpuart_start_rx_dma (sport ))
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- rx_dma_timer_init (sport );
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- else
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- sport -> lpuart_dma_rx_use = false;
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+ if (sport -> lpuart_dma_rx_use ) {
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+ /*
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+ * EDMA driver during suspend will forcefully release any
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+ * non-idle DMA channels. If port wakeup is enabled or if port
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+ * is console port or 'no_console_suspend' is set the Rx DMA
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+ * cannot resume as expected, hence gracefully release the
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+ * Rx DMA path before suspend and start Rx DMA path on resume.
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+ */
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+ del_timer_sync (& sport -> lpuart_timer );
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+ lpuart_dma_rx_free (& sport -> port );
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+
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+ /* Disable Rx DMA to use UART port as wakeup source */
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+ spin_lock_irqsave (& sport -> port .lock , flags );
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+ if (lpuart_is_32 (sport )) {
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+ temp = lpuart32_read (& sport -> port , UARTBAUD );
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+ lpuart32_write (& sport -> port , temp & ~UARTBAUD_RDMAE ,
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+ UARTBAUD );
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+ } else {
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+ writeb (readb (sport -> port .membase + UARTCR5 ) &
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+ ~UARTCR5_RDMAS , sport -> port .membase + UARTCR5 );
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+ }
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+ spin_unlock_irqrestore (& sport -> port .lock , flags );
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+ }
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+
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+ if (sport -> lpuart_dma_tx_use ) {
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+ spin_lock_irqsave (& sport -> port .lock , flags );
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+ if (lpuart_is_32 (sport )) {
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+ temp = lpuart32_read (& sport -> port , UARTBAUD );
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+ temp &= ~UARTBAUD_TDMAE ;
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+ lpuart32_write (& sport -> port , temp , UARTBAUD );
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+ } else {
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+ temp = readb (sport -> port .membase + UARTCR5 );
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+ temp &= ~UARTCR5_TDMAS ;
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+ writeb (temp , sport -> port .membase + UARTCR5 );
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+ }
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+ spin_unlock_irqrestore (& sport -> port .lock , flags );
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+ sport -> dma_tx_in_progress = false;
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+ dmaengine_terminate_all (sport -> dma_tx_chan );
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}
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}
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- lpuart_tx_dma_startup (sport );
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+ return 0 ;
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+ }
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- if (lpuart_is_32 (sport ))
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- lpuart32_configure (sport );
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+ static void lpuart_console_fixup (struct lpuart_port * sport )
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+ {
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+ struct tty_port * port = & sport -> port .state -> port ;
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+ struct uart_port * uport = & sport -> port ;
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+ struct ktermios termios ;
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+
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+ /* i.MX7ULP enter VLLS mode that lpuart module power off and registers
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+ * all lost no matter the port is wakeup source.
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+ * For console port, console baud rate setting lost and print messy
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+ * log when enable the console port as wakeup source. To avoid the
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+ * issue happen, user should not enable uart port as wakeup source
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+ * in VLLS mode, or restore console setting here.
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+ */
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+ if (is_imx7ulp_lpuart (sport ) && lpuart_uport_is_active (sport ) &&
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+ console_suspend_enabled && uart_console (& sport -> port )) {
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+
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+ mutex_lock (& port -> mutex );
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+ memset (& termios , 0 , sizeof (struct ktermios ));
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+ termios .c_cflag = uport -> cons -> cflag ;
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+ if (port -> tty && termios .c_cflag == 0 )
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+ termios = port -> tty -> termios ;
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+ uport -> ops -> set_termios (uport , & termios , NULL );
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+ mutex_unlock (& port -> mutex );
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+ }
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+ }
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+
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+ static int __maybe_unused lpuart_resume (struct device * dev )
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+ {
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+ struct lpuart_port * sport = dev_get_drvdata (dev );
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+
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+ if (lpuart_uport_is_active (sport )) {
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+ if (lpuart_is_32 (sport ))
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+ lpuart32_hw_setup (sport );
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+ else
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+ lpuart_hw_setup (sport );
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+ }
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+ lpuart_console_fixup (sport );
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uart_resume_port (& lpuart_reg , & sport -> port );
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return 0 ;
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}
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- static SIMPLE_DEV_PM_OPS (lpuart_pm_ops , lpuart_suspend , lpuart_resume ) ;
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+ static const struct dev_pm_ops lpuart_pm_ops = {
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+ SET_NOIRQ_SYSTEM_SLEEP_PM_OPS (lpuart_suspend_noirq ,
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+ lpuart_resume_noirq )
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+ SET_SYSTEM_SLEEP_PM_OPS (lpuart_suspend , lpuart_resume )
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+ };
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static struct platform_driver lpuart_driver = {
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.probe = lpuart_probe ,
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