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Marc Zyngieroupton
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KVM: arm64: Add save/restore for TCR2_EL2
Like its EL1 equivalent, TCR2_EL2 gets context-switched. This is made conditional on FEAT_TCRX being adversised. Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Oliver Upton <[email protected]>
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arch/arm64/kvm/hyp/vhe/sysreg-sr.c

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@@ -51,6 +51,9 @@ static void __sysreg_save_vel2_state(struct kvm_vcpu *vcpu)
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__vcpu_sys_reg(vcpu, TTBR1_EL2) = read_sysreg_el1(SYS_TTBR1);
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__vcpu_sys_reg(vcpu, TCR_EL2) = read_sysreg_el1(SYS_TCR);
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if (ctxt_has_tcrx(&vcpu->arch.ctxt))
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__vcpu_sys_reg(vcpu, TCR2_EL2) = read_sysreg_el1(SYS_TCR2);
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/*
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* The EL1 view of CNTKCTL_EL1 has a bunch of RES0 bits where
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* the interesting CNTHCTL_EL2 bits live. So preserve these
@@ -107,6 +110,10 @@ static void __sysreg_restore_vel2_state(struct kvm_vcpu *vcpu)
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write_sysreg_el1(val, SYS_TCR);
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}
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if (ctxt_has_tcrx(&vcpu->arch.ctxt))
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write_sysreg_el1(__vcpu_sys_reg(vcpu, TCR2_EL2), SYS_TCR2);
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write_sysreg_el1(__vcpu_sys_reg(vcpu, ESR_EL2), SYS_ESR);
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write_sysreg_el1(__vcpu_sys_reg(vcpu, AFSR0_EL2), SYS_AFSR0);
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write_sysreg_el1(__vcpu_sys_reg(vcpu, AFSR1_EL2), SYS_AFSR1);

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