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ALSA: firewire-motu: refactoring protocol v2 for fetching mode switch
This commit splits the method to switch fetching mode for protocol version 2 so that model-dependent operations are explicitly defined. Signed-off-by: Takashi Sakamoto <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Takashi Iwai <[email protected]>
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sound/firewire/motu/motu-protocol-v2.c

Lines changed: 47 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -170,52 +170,69 @@ int snd_motu_protocol_v2_get_clock_source(struct snd_motu *motu,
170170
return get_clock_source(motu, be32_to_cpu(reg), src);
171171
}
172172

173-
int snd_motu_protocol_v2_switch_fetching_mode(struct snd_motu *motu,
174-
bool enable)
173+
// Expected for Traveler and 896HD, which implements Altera Cyclone EP1C3.
174+
static int switch_fetching_mode_cyclone(struct snd_motu *motu, u32 *data,
175+
bool enable)
175176
{
176-
enum snd_motu_clock_source src;
177-
__be32 reg;
178-
u32 data;
179-
int err = 0;
177+
*data |= V2_CLOCK_MODEL_SPECIFIC;
180178

181-
// 828mkII implements Altera ACEX 1K EP1K30. Nothing to do.
182-
if (motu->spec == &snd_motu_spec_828mk2)
183-
return 0;
179+
return 0;
180+
}
184181

185-
err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET, &reg,
186-
sizeof(reg));
182+
// For UltraLite and 8pre, which implements Xilinx Spartan XC3S200.
183+
static int switch_fetching_mode_spartan(struct snd_motu *motu, u32 *data,
184+
bool enable)
185+
{
186+
unsigned int rate;
187+
enum snd_motu_clock_source src;
188+
int err;
189+
190+
err = get_clock_source(motu, *data, &src);
187191
if (err < 0)
188192
return err;
189-
data = be32_to_cpu(reg);
190193

191-
err = get_clock_source(motu, data, &src);
194+
err = get_clock_rate(*data, &rate);
192195
if (err < 0)
193196
return err;
194197

195-
data &= ~(V2_CLOCK_FETCH_ENABLE | V2_CLOCK_MODEL_SPECIFIC);
196-
if (enable)
197-
data |= V2_CLOCK_FETCH_ENABLE;
198+
if (src == SND_MOTU_CLOCK_SOURCE_SPH && rate > 48000)
199+
*data |= V2_CLOCK_MODEL_SPECIFIC;
198200

199-
if (motu->spec == &snd_motu_spec_traveler) {
200-
// Expected for Traveler and 896HD, which implements Altera
201-
// Cyclone EP1C3.
202-
data |= V2_CLOCK_MODEL_SPECIFIC;
201+
return 0;
202+
}
203+
204+
int snd_motu_protocol_v2_switch_fetching_mode(struct snd_motu *motu,
205+
bool enable)
206+
{
207+
if (motu->spec == &snd_motu_spec_828mk2) {
208+
// 828mkII implements Altera ACEX 1K EP1K30. Nothing to do.
209+
return 0;
203210
} else {
204-
// For UltraLite and 8pre, which implements Xilinx Spartan
205-
// XC3S200.
206-
unsigned int rate;
211+
__be32 reg;
212+
u32 data;
213+
int err;
207214

208-
err = get_clock_rate(data, &rate);
215+
err = snd_motu_transaction_read(motu, V2_CLOCK_STATUS_OFFSET,
216+
&reg, sizeof(reg));
209217
if (err < 0)
210218
return err;
219+
data = be32_to_cpu(reg);
211220

212-
if (src == SND_MOTU_CLOCK_SOURCE_SPH && rate > 48000)
213-
data |= V2_CLOCK_MODEL_SPECIFIC;
214-
}
221+
data &= ~(V2_CLOCK_FETCH_ENABLE | V2_CLOCK_MODEL_SPECIFIC);
222+
if (enable)
223+
data |= V2_CLOCK_FETCH_ENABLE;
215224

216-
reg = cpu_to_be32(data);
217-
return snd_motu_transaction_write(motu, V2_CLOCK_STATUS_OFFSET, &reg,
218-
sizeof(reg));
225+
if (motu->spec == &snd_motu_spec_traveler)
226+
err = switch_fetching_mode_cyclone(motu, &data, enable);
227+
else
228+
err = switch_fetching_mode_spartan(motu, &data, enable);
229+
if (err < 0)
230+
return err;
231+
232+
reg = cpu_to_be32(data);
233+
return snd_motu_transaction_write(motu, V2_CLOCK_STATUS_OFFSET,
234+
&reg, sizeof(reg));
235+
}
219236
}
220237

221238
static int detect_packet_formats_828mk2(struct snd_motu *motu, u32 data)

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