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nxpfranklibjorn-helgaas
nxpfrankli
authored and
bjorn-helgaas
committed
PCI: dwc: Rename cpu_addr to parent_bus_addr for ATU configuration
Rename 'cpu_addr' to 'parent_bus_addr' in the DesignWare ATU configuration. The ATU translates parent bus addresses to PCI addresses, which are often the same as CPU addresses but can differ in systems where the bus fabric translates addresses before passing them to the PCIe controller. This renaming clarifies the purpose and avoids confusion. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Frank Li <[email protected]> Signed-off-by: Bjorn Helgaas <[email protected]>
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4 files changed

+31
-30
lines changed

4 files changed

+31
-30
lines changed

‎drivers/pci/controller/dwc/pcie-designware-ep.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -128,7 +128,7 @@ static int dw_pcie_ep_write_header(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
128128
}
129129

130130
static int dw_pcie_ep_inbound_atu(struct dw_pcie_ep *ep, u8 func_no, int type,
131-
dma_addr_t cpu_addr, enum pci_barno bar,
131+
dma_addr_t parent_bus_addr, enum pci_barno bar,
132132
size_t size)
133133
{
134134
int ret;
@@ -146,7 +146,7 @@ static int dw_pcie_ep_inbound_atu(struct dw_pcie_ep *ep, u8 func_no, int type,
146146
}
147147

148148
ret = dw_pcie_prog_ep_inbound_atu(pci, func_no, free_win, type,
149-
cpu_addr, bar, size);
149+
parent_bus_addr, bar, size);
150150
if (ret < 0) {
151151
dev_err(pci->dev, "Failed to program IB window\n");
152152
return ret;
@@ -181,7 +181,7 @@ static int dw_pcie_ep_outbound_atu(struct dw_pcie_ep *ep,
181181
return ret;
182182

183183
set_bit(free_win, ep->ob_window_map);
184-
ep->outbound_addr[free_win] = atu->cpu_addr;
184+
ep->outbound_addr[free_win] = atu->parent_bus_addr;
185185

186186
return 0;
187187
}
@@ -333,7 +333,7 @@ static int dw_pcie_ep_map_addr(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
333333

334334
atu.func_no = func_no;
335335
atu.type = PCIE_ATU_TYPE_MEM;
336-
atu.cpu_addr = addr;
336+
atu.parent_bus_addr = addr;
337337
atu.pci_addr = pci_addr;
338338
atu.size = size;
339339
ret = dw_pcie_ep_outbound_atu(ep, &atu);

‎drivers/pci/controller/dwc/pcie-designware-host.c

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -616,7 +616,7 @@ static void __iomem *dw_pcie_other_conf_map_bus(struct pci_bus *bus,
616616
type = PCIE_ATU_TYPE_CFG1;
617617

618618
atu.type = type;
619-
atu.cpu_addr = pp->cfg0_base;
619+
atu.parent_bus_addr = pp->cfg0_base;
620620
atu.pci_addr = busdev;
621621
atu.size = pp->cfg0_size;
622622

@@ -641,7 +641,7 @@ static int dw_pcie_rd_other_conf(struct pci_bus *bus, unsigned int devfn,
641641

642642
if (pp->cfg0_io_shared) {
643643
atu.type = PCIE_ATU_TYPE_IO;
644-
atu.cpu_addr = pp->io_base;
644+
atu.parent_bus_addr = pp->io_base;
645645
atu.pci_addr = pp->io_bus_addr;
646646
atu.size = pp->io_size;
647647

@@ -667,7 +667,7 @@ static int dw_pcie_wr_other_conf(struct pci_bus *bus, unsigned int devfn,
667667

668668
if (pp->cfg0_io_shared) {
669669
atu.type = PCIE_ATU_TYPE_IO;
670-
atu.cpu_addr = pp->io_base;
670+
atu.parent_bus_addr = pp->io_base;
671671
atu.pci_addr = pp->io_bus_addr;
672672
atu.size = pp->io_size;
673673

@@ -736,7 +736,7 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
736736

737737
atu.index = i;
738738
atu.type = PCIE_ATU_TYPE_MEM;
739-
atu.cpu_addr = entry->res->start;
739+
atu.parent_bus_addr = entry->res->start;
740740
atu.pci_addr = entry->res->start - entry->offset;
741741

742742
/* Adjust iATU size if MSG TLP region was allocated before */
@@ -758,7 +758,7 @@ static int dw_pcie_iatu_setup(struct dw_pcie_rp *pp)
758758
if (pci->num_ob_windows > ++i) {
759759
atu.index = i;
760760
atu.type = PCIE_ATU_TYPE_IO;
761-
atu.cpu_addr = pp->io_base;
761+
atu.parent_bus_addr = pp->io_base;
762762
atu.pci_addr = pp->io_bus_addr;
763763
atu.size = pp->io_size;
764764

@@ -902,7 +902,7 @@ static int dw_pcie_pme_turn_off(struct dw_pcie *pci)
902902
atu.size = resource_size(pci->pp.msg_res);
903903
atu.index = pci->pp.msg_atu_index;
904904

905-
atu.cpu_addr = pci->pp.msg_res->start;
905+
atu.parent_bus_addr = pci->pp.msg_res->start;
906906

907907
ret = dw_pcie_prog_outbound_atu(pci, &atu);
908908
if (ret)

‎drivers/pci/controller/dwc/pcie-designware.c

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -470,25 +470,25 @@ static inline u32 dw_pcie_enable_ecrc(u32 val)
470470
int dw_pcie_prog_outbound_atu(struct dw_pcie *pci,
471471
const struct dw_pcie_ob_atu_cfg *atu)
472472
{
473-
u64 cpu_addr = atu->cpu_addr;
473+
u64 parent_bus_addr = atu->parent_bus_addr;
474474
u32 retries, val;
475475
u64 limit_addr;
476476

477477
if (pci->ops && pci->ops->cpu_addr_fixup)
478-
cpu_addr = pci->ops->cpu_addr_fixup(pci, cpu_addr);
478+
parent_bus_addr = pci->ops->cpu_addr_fixup(pci, parent_bus_addr);
479479

480-
limit_addr = cpu_addr + atu->size - 1;
480+
limit_addr = parent_bus_addr + atu->size - 1;
481481

482-
if ((limit_addr & ~pci->region_limit) != (cpu_addr & ~pci->region_limit) ||
483-
!IS_ALIGNED(cpu_addr, pci->region_align) ||
482+
if ((limit_addr & ~pci->region_limit) != (parent_bus_addr & ~pci->region_limit) ||
483+
!IS_ALIGNED(parent_bus_addr, pci->region_align) ||
484484
!IS_ALIGNED(atu->pci_addr, pci->region_align) || !atu->size) {
485485
return -EINVAL;
486486
}
487487

488488
dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_LOWER_BASE,
489-
lower_32_bits(cpu_addr));
489+
lower_32_bits(parent_bus_addr));
490490
dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_UPPER_BASE,
491-
upper_32_bits(cpu_addr));
491+
upper_32_bits(parent_bus_addr));
492492

493493
dw_pcie_writel_atu_ob(pci, atu->index, PCIE_ATU_LIMIT,
494494
lower_32_bits(limit_addr));
@@ -502,7 +502,7 @@ int dw_pcie_prog_outbound_atu(struct dw_pcie *pci,
502502
upper_32_bits(atu->pci_addr));
503503

504504
val = atu->type | atu->routing | PCIE_ATU_FUNC_NUM(atu->func_no);
505-
if (upper_32_bits(limit_addr) > upper_32_bits(cpu_addr) &&
505+
if (upper_32_bits(limit_addr) > upper_32_bits(parent_bus_addr) &&
506506
dw_pcie_ver_is_ge(pci, 460A))
507507
val |= PCIE_ATU_INCREASE_REGION_SIZE;
508508
if (dw_pcie_ver_is(pci, 490A))
@@ -545,13 +545,13 @@ static inline void dw_pcie_writel_atu_ib(struct dw_pcie *pci, u32 index, u32 reg
545545
}
546546

547547
int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int type,
548-
u64 cpu_addr, u64 pci_addr, u64 size)
548+
u64 parent_bus_addr, u64 pci_addr, u64 size)
549549
{
550550
u64 limit_addr = pci_addr + size - 1;
551551
u32 retries, val;
552552

553553
if ((limit_addr & ~pci->region_limit) != (pci_addr & ~pci->region_limit) ||
554-
!IS_ALIGNED(cpu_addr, pci->region_align) ||
554+
!IS_ALIGNED(parent_bus_addr, pci->region_align) ||
555555
!IS_ALIGNED(pci_addr, pci->region_align) || !size) {
556556
return -EINVAL;
557557
}
@@ -568,9 +568,9 @@ int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int type,
568568
upper_32_bits(limit_addr));
569569

570570
dw_pcie_writel_atu_ib(pci, index, PCIE_ATU_LOWER_TARGET,
571-
lower_32_bits(cpu_addr));
571+
lower_32_bits(parent_bus_addr));
572572
dw_pcie_writel_atu_ib(pci, index, PCIE_ATU_UPPER_TARGET,
573-
upper_32_bits(cpu_addr));
573+
upper_32_bits(parent_bus_addr));
574574

575575
val = type;
576576
if (upper_32_bits(limit_addr) > upper_32_bits(pci_addr) &&
@@ -597,18 +597,18 @@ int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int type,
597597
}
598598

599599
int dw_pcie_prog_ep_inbound_atu(struct dw_pcie *pci, u8 func_no, int index,
600-
int type, u64 cpu_addr, u8 bar, size_t size)
600+
int type, u64 parent_bus_addr, u8 bar, size_t size)
601601
{
602602
u32 retries, val;
603603

604-
if (!IS_ALIGNED(cpu_addr, pci->region_align) ||
605-
!IS_ALIGNED(cpu_addr, size))
604+
if (!IS_ALIGNED(parent_bus_addr, pci->region_align) ||
605+
!IS_ALIGNED(parent_bus_addr, size))
606606
return -EINVAL;
607607

608608
dw_pcie_writel_atu_ib(pci, index, PCIE_ATU_LOWER_TARGET,
609-
lower_32_bits(cpu_addr));
609+
lower_32_bits(parent_bus_addr));
610610
dw_pcie_writel_atu_ib(pci, index, PCIE_ATU_UPPER_TARGET,
611-
upper_32_bits(cpu_addr));
611+
upper_32_bits(parent_bus_addr));
612612

613613
dw_pcie_writel_atu_ib(pci, index, PCIE_ATU_REGION_CTRL1, type |
614614
PCIE_ATU_FUNC_NUM(func_no));

‎drivers/pci/controller/dwc/pcie-designware.h

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -343,7 +343,7 @@ struct dw_pcie_ob_atu_cfg {
343343
u8 func_no;
344344
u8 code;
345345
u8 routing;
346-
u64 cpu_addr;
346+
u64 parent_bus_addr;
347347
u64 pci_addr;
348348
u64 size;
349349
};
@@ -491,9 +491,10 @@ int dw_pcie_wait_for_link(struct dw_pcie *pci);
491491
int dw_pcie_prog_outbound_atu(struct dw_pcie *pci,
492492
const struct dw_pcie_ob_atu_cfg *atu);
493493
int dw_pcie_prog_inbound_atu(struct dw_pcie *pci, int index, int type,
494-
u64 cpu_addr, u64 pci_addr, u64 size);
494+
u64 parent_bus_addr, u64 pci_addr, u64 size);
495495
int dw_pcie_prog_ep_inbound_atu(struct dw_pcie *pci, u8 func_no, int index,
496-
int type, u64 cpu_addr, u8 bar, size_t size);
496+
int type, u64 parent_bus_addr,
497+
u8 bar, size_t size);
497498
void dw_pcie_disable_atu(struct dw_pcie *pci, u32 dir, int index);
498499
void dw_pcie_setup(struct dw_pcie *pci);
499500
void dw_pcie_iatu_detect(struct dw_pcie *pci);

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