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Merge tag 'cxl-fixes-6.11-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl
Pull cxl fixes from Dave Jiang: "Check for RCH dport before accessing pci_host_bridge and a fix to address a KASAN warning for the cxl regression test suite cxl-test" * tag 'cxl-fixes-6.11-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl: cxl/test: Skip cxl_setup_parent_dport() for emulated dports cxl/pci: Get AER capability address from RCRB only for RCH dport
2 parents 6e44365 + 2c402bd commit 521b1e7

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3 files changed

+19
-4
lines changed

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+19
-4
lines changed

drivers/cxl/core/pci.c

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -834,11 +834,13 @@ static void cxl_disable_rch_root_ints(struct cxl_dport *dport)
834834
void cxl_setup_parent_dport(struct device *host, struct cxl_dport *dport)
835835
{
836836
struct device *dport_dev = dport->dport_dev;
837-
struct pci_host_bridge *host_bridge;
838837

839-
host_bridge = to_pci_host_bridge(dport_dev);
840-
if (host_bridge->native_aer)
841-
dport->rcrb.aer_cap = cxl_rcrb_to_aer(dport_dev, dport->rcrb.base);
838+
if (dport->rch) {
839+
struct pci_host_bridge *host_bridge = to_pci_host_bridge(dport_dev);
840+
841+
if (host_bridge->native_aer)
842+
dport->rcrb.aer_cap = cxl_rcrb_to_aer(dport_dev, dport->rcrb.base);
843+
}
842844

843845
dport->reg_map.host = host;
844846
cxl_dport_map_regs(dport);

tools/testing/cxl/Kbuild

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@ ldflags-y += --wrap=cxl_dvsec_rr_decode
1414
ldflags-y += --wrap=devm_cxl_add_rch_dport
1515
ldflags-y += --wrap=cxl_rcd_component_reg_phys
1616
ldflags-y += --wrap=cxl_endpoint_parse_cdat
17+
ldflags-y += --wrap=cxl_setup_parent_dport
1718

1819
DRIVERS := ../../../drivers
1920
CXL_SRC := $(DRIVERS)/cxl

tools/testing/cxl/test/mock.c

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -299,6 +299,18 @@ void __wrap_cxl_endpoint_parse_cdat(struct cxl_port *port)
299299
}
300300
EXPORT_SYMBOL_NS_GPL(__wrap_cxl_endpoint_parse_cdat, CXL);
301301

302+
void __wrap_cxl_setup_parent_dport(struct device *host, struct cxl_dport *dport)
303+
{
304+
int index;
305+
struct cxl_mock_ops *ops = get_cxl_mock_ops(&index);
306+
307+
if (!ops || !ops->is_mock_port(dport->dport_dev))
308+
cxl_setup_parent_dport(host, dport);
309+
310+
put_cxl_mock_ops(index);
311+
}
312+
EXPORT_SYMBOL_NS_GPL(__wrap_cxl_setup_parent_dport, CXL);
313+
302314
MODULE_LICENSE("GPL v2");
303315
MODULE_IMPORT_NS(ACPI);
304316
MODULE_IMPORT_NS(CXL);

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