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RanderWangbroonie
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ASoC: SOF: Intel: hda-dsp: harden D0i3 programming sequence
Add delay between set and wait command according to hardware programming sequence. Also add debug log to detect error. Signed-off-by: Rander Wang <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Reviewed-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Péter Ujfalusi <[email protected]> Reviewed-by: Ranjani Sridharan <[email protected]> Signed-off-by: Peter Ujfalusi <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
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sound/soc/sof/intel/hda-dsp.c

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@@ -392,6 +392,12 @@ static int hda_dsp_update_d0i3c_register(struct snd_sof_dev *sdev, u8 value)
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snd_sof_dsp_update8(sdev, HDA_DSP_HDA_BAR, chip->d0i3_offset,
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SOF_HDA_VS_D0I3C_I3, value);
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/*
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* The value written to the D0I3C::I3 bit may not be taken into account immediately.
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* A delay is recommended before checking if D0I3C::CIP is cleared
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*/
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usleep_range(30, 40);
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/* Wait for cmd in progress to be cleared before exiting the function */
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ret = hda_dsp_wait_d0i3c_done(sdev);
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if (ret < 0) {
@@ -400,6 +406,12 @@ static int hda_dsp_update_d0i3c_register(struct snd_sof_dev *sdev, u8 value)
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}
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reg = snd_sof_dsp_read8(sdev, HDA_DSP_HDA_BAR, chip->d0i3_offset);
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/* Confirm d0i3 state changed with paranoia check */
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if ((reg ^ value) & SOF_HDA_VS_D0I3C_I3) {
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dev_err(sdev->dev, "failed to update D0I3C!\n");
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return -EIO;
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}
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trace_sof_intel_D0I3C_updated(sdev, reg);
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return 0;

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