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ASoC: rockchip: i2s_tdm: Re-add the set_sysclk callback
In commit 9e2ab4b ("ASoC: rockchip: i2s-tdm: Fix inaccurate sampling rates"), the set_sysclk callback was removed as considered unused as the mclk rate can be set in the hw_params callback. The difference between hw_params and set_sysclk is that the former is called with the audio sampling rate set in the params (e.g.: 48000 Hz) while the latter is called with a clock rate already computed with sampling_rate * mclk-fs (e.g.: 48000 * 256) For HDMI audio using the Rockchip I2S TDM driver, the mclk-fs value must be set to 128 instead of the default 256, and that value is set in the device tree at the machine driver level (like a simple-audio-card compatible node). Therefore, the i2s_tdm driver has no idea that another mclk-fs value can be configured and simply computes the mclk rate in the hw_params callback with DEFAULT_MCLK_FS * params_rate(params), which is wrong for HDMI audio. Re-add the set_sysclk callback so that the mclk rate is computed by the machine driver which has the correct mclk-fs value set in its device tree node. Fixes: 9e2ab4b ("ASoC: rockchip: i2s-tdm: Fix inaccurate sampling rates") Signed-off-by: Detlev Casanova <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Mark Brown <[email protected]>
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sound/soc/rockchip/rockchip_i2s_tdm.c

Lines changed: 29 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,6 @@
2222

2323
#define DRV_NAME "rockchip-i2s-tdm"
2424

25-
#define DEFAULT_MCLK_FS 256
2625
#define CH_GRP_MAX 4 /* The max channel 8 / 2 */
2726
#define MULTIPLEX_CH_MAX 10
2827

@@ -70,6 +69,8 @@ struct rk_i2s_tdm_dev {
7069
bool has_playback;
7170
bool has_capture;
7271
struct snd_soc_dai_driver *dai;
72+
unsigned int mclk_rx_freq;
73+
unsigned int mclk_tx_freq;
7374
};
7475

7576
static int to_ch_num(unsigned int val)
@@ -617,6 +618,27 @@ static int rockchip_i2s_trcm_mode(struct snd_pcm_substream *substream,
617618
return 0;
618619
}
619620

621+
static int rockchip_i2s_tdm_set_sysclk(struct snd_soc_dai *cpu_dai, int stream,
622+
unsigned int freq, int dir)
623+
{
624+
struct rk_i2s_tdm_dev *i2s_tdm = to_info(cpu_dai);
625+
626+
if (i2s_tdm->clk_trcm) {
627+
i2s_tdm->mclk_tx_freq = freq;
628+
i2s_tdm->mclk_rx_freq = freq;
629+
} else {
630+
if (stream == SNDRV_PCM_STREAM_PLAYBACK)
631+
i2s_tdm->mclk_tx_freq = freq;
632+
else
633+
i2s_tdm->mclk_rx_freq = freq;
634+
}
635+
636+
dev_dbg(i2s_tdm->dev, "The target mclk_%s freq is: %d\n",
637+
stream ? "rx" : "tx", freq);
638+
639+
return 0;
640+
}
641+
620642
static int rockchip_i2s_tdm_hw_params(struct snd_pcm_substream *substream,
621643
struct snd_pcm_hw_params *params,
622644
struct snd_soc_dai *dai)
@@ -631,15 +653,19 @@ static int rockchip_i2s_tdm_hw_params(struct snd_pcm_substream *substream,
631653

632654
if (i2s_tdm->clk_trcm == TRCM_TX) {
633655
mclk = i2s_tdm->mclk_tx;
656+
mclk_rate = i2s_tdm->mclk_tx_freq;
634657
} else if (i2s_tdm->clk_trcm == TRCM_RX) {
635658
mclk = i2s_tdm->mclk_rx;
659+
mclk_rate = i2s_tdm->mclk_rx_freq;
636660
} else if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
637661
mclk = i2s_tdm->mclk_tx;
662+
mclk_rate = i2s_tdm->mclk_tx_freq;
638663
} else {
639664
mclk = i2s_tdm->mclk_rx;
665+
mclk_rate = i2s_tdm->mclk_rx_freq;
640666
}
641667

642-
err = clk_set_rate(mclk, DEFAULT_MCLK_FS * params_rate(params));
668+
err = clk_set_rate(mclk, mclk_rate);
643669
if (err)
644670
return err;
645671

@@ -799,6 +825,7 @@ static const struct snd_soc_dai_ops rockchip_i2s_tdm_dai_ops = {
799825
.hw_params = rockchip_i2s_tdm_hw_params,
800826
.set_bclk_ratio = rockchip_i2s_tdm_set_bclk_ratio,
801827
.set_fmt = rockchip_i2s_tdm_set_fmt,
828+
.set_sysclk = rockchip_i2s_tdm_set_sysclk,
802829
.set_tdm_slot = rockchip_dai_tdm_slot,
803830
.trigger = rockchip_i2s_tdm_trigger,
804831
};

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