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KVM: arm64: nv: Honor guest hypervisor's FP/SVE traps in CPTR_EL2
Start folding the guest hypervisor's FP/SVE traps into the value programmed in hardware. Note that as of writing this is dead code, since KVM does a full put() / load() for every nested exception boundary which saves + flushes the FP/SVE state. However, this will become useful when we can keep the guest's FP/SVE state alive across a nested exception boundary and the host no longer needs to conservatively program traps. Reviewed-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Oliver Upton <[email protected]>
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arch/arm64/kvm/hyp/vhe/switch.c

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@@ -67,6 +67,8 @@ static u64 __compute_hcr(struct kvm_vcpu *vcpu)
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static void __activate_cptr_traps(struct kvm_vcpu *vcpu)
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{
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u64 cptr;
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/*
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* With VHE (HCR.E2H == 1), accesses to CPACR_EL1 are routed to
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* CPTR_EL2. In general, CPACR_EL1 has the same layout as CPTR_EL2,
@@ -85,6 +87,35 @@ static void __activate_cptr_traps(struct kvm_vcpu *vcpu)
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__activate_traps_fpsimd32(vcpu);
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}
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/*
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* Layer the guest hypervisor's trap configuration on top of our own if
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* we're in a nested context.
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*/
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if (!vcpu_has_nv(vcpu) || is_hyp_ctxt(vcpu))
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goto write;
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cptr = vcpu_sanitised_cptr_el2(vcpu);
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/*
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* Pay attention, there's some interesting detail here.
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*
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* The CPTR_EL2.xEN fields are 2 bits wide, although there are only two
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* meaningful trap states when HCR_EL2.TGE = 0 (running a nested guest):
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*
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* - CPTR_EL2.xEN = x0, traps are enabled
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* - CPTR_EL2.xEN = x1, traps are disabled
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*
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* In other words, bit[0] determines if guest accesses trap or not. In
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* the interest of simplicity, clear the entire field if the guest
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* hypervisor has traps enabled to dispel any illusion of something more
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* complicated taking place.
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*/
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if (!(SYS_FIELD_GET(CPACR_ELx, FPEN, cptr) & BIT(0)))
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val &= ~CPACR_ELx_FPEN;
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if (!(SYS_FIELD_GET(CPACR_ELx, ZEN, cptr) & BIT(0)))
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val &= ~CPACR_ELx_ZEN;
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write:
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write_sysreg(val, cpacr_el1);
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}
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