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dt-bindings: timer: Correct indentation and style in DTS example
DTS example in the bindings should be indented with 2- or 4-spaces and aligned with opening '- |', so correct any differences like 3-spaces or mixtures 2- and 4-spaces in one binding. No functional changes here, but saves some comments during reviews of new patches built on existing code. Signed-off-by: Krzysztof Kozlowski <[email protected]> Reviewed-by: Niklas Söderlund <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Daniel Lezcano <[email protected]>
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‎Documentation/devicetree/bindings/timer/arm,twd-timer.yaml

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,7 @@ examples:
5050
#include <dt-bindings/interrupt-controller/arm-gic.h>
5151
5252
timer@2c000600 {
53-
compatible = "arm,arm11mp-twd-timer";
54-
reg = <0x2c000600 0x20>;
55-
interrupts = <GIC_PPI 13 0xf01>;
53+
compatible = "arm,arm11mp-twd-timer";
54+
reg = <0x2c000600 0x20>;
55+
interrupts = <GIC_PPI 13 0xf01>;
5656
};

‎Documentation/devicetree/bindings/timer/renesas,cmt.yaml

Lines changed: 22 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -178,29 +178,29 @@ examples:
178178
#include <dt-bindings/interrupt-controller/arm-gic.h>
179179
#include <dt-bindings/power/r8a7790-sysc.h>
180180
cmt0: timer@ffca0000 {
181-
compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0";
182-
reg = <0xffca0000 0x1004>;
183-
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
184-
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
185-
clocks = <&cpg CPG_MOD 124>;
186-
clock-names = "fck";
187-
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
188-
resets = <&cpg 124>;
181+
compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0";
182+
reg = <0xffca0000 0x1004>;
183+
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
184+
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
185+
clocks = <&cpg CPG_MOD 124>;
186+
clock-names = "fck";
187+
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
188+
resets = <&cpg 124>;
189189
};
190190
191191
cmt1: timer@e6130000 {
192-
compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1";
193-
reg = <0xe6130000 0x1004>;
194-
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
195-
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
196-
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
197-
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
198-
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
199-
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
200-
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
201-
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
202-
clocks = <&cpg CPG_MOD 329>;
203-
clock-names = "fck";
204-
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
205-
resets = <&cpg 329>;
192+
compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1";
193+
reg = <0xe6130000 0x1004>;
194+
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
195+
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
196+
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
197+
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
198+
<GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
199+
<GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
200+
<GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
201+
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
202+
clocks = <&cpg CPG_MOD 329>;
203+
clock-names = "fck";
204+
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
205+
resets = <&cpg 329>;
206206
};

‎Documentation/devicetree/bindings/timer/renesas,em-sti.yaml

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -38,9 +38,9 @@ examples:
3838
- |
3939
#include <dt-bindings/interrupt-controller/arm-gic.h>
4040
timer@e0180000 {
41-
compatible = "renesas,em-sti";
42-
reg = <0xe0180000 0x54>;
43-
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
44-
clocks = <&sti_sclk>;
45-
clock-names = "sclk";
41+
compatible = "renesas,em-sti";
42+
reg = <0xe0180000 0x54>;
43+
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
44+
clocks = <&sti_sclk>;
45+
clock-names = "sclk";
4646
};

‎Documentation/devicetree/bindings/timer/renesas,mtu2.yaml

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -66,11 +66,11 @@ examples:
6666
#include <dt-bindings/clock/r7s72100-clock.h>
6767
#include <dt-bindings/interrupt-controller/arm-gic.h>
6868
mtu2: timer@fcff0000 {
69-
compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
70-
reg = <0xfcff0000 0x400>;
71-
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
72-
interrupt-names = "tgi0a";
73-
clocks = <&mstp3_clks R7S72100_CLK_MTU2>;
74-
clock-names = "fck";
75-
power-domains = <&cpg_clocks>;
69+
compatible = "renesas,mtu2-r7s72100", "renesas,mtu2";
70+
reg = <0xfcff0000 0x400>;
71+
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
72+
interrupt-names = "tgi0a";
73+
clocks = <&mstp3_clks R7S72100_CLK_MTU2>;
74+
clock-names = "fck";
75+
power-domains = <&cpg_clocks>;
7676
};

‎Documentation/devicetree/bindings/timer/renesas,ostm.yaml

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -71,9 +71,9 @@ examples:
7171
#include <dt-bindings/clock/r7s72100-clock.h>
7272
#include <dt-bindings/interrupt-controller/arm-gic.h>
7373
ostm0: timer@fcfec000 {
74-
compatible = "renesas,r7s72100-ostm", "renesas,ostm";
75-
reg = <0xfcfec000 0x30>;
76-
interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>;
77-
clocks = <&mstp5_clks R7S72100_CLK_OSTM0>;
78-
power-domains = <&cpg_clocks>;
74+
compatible = "renesas,r7s72100-ostm", "renesas,ostm";
75+
reg = <0xfcfec000 0x30>;
76+
interrupts = <GIC_SPI 102 IRQ_TYPE_EDGE_RISING>;
77+
clocks = <&mstp5_clks R7S72100_CLK_OSTM0>;
78+
power-domains = <&cpg_clocks>;
7979
};

‎Documentation/devicetree/bindings/timer/renesas,tmu.yaml

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -122,15 +122,15 @@ examples:
122122
#include <dt-bindings/interrupt-controller/arm-gic.h>
123123
#include <dt-bindings/power/r8a7779-sysc.h>
124124
tmu0: timer@ffd80000 {
125-
compatible = "renesas,tmu-r8a7779", "renesas,tmu";
126-
reg = <0xffd80000 0x30>;
127-
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
128-
<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
129-
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
130-
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
131-
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
132-
clocks = <&mstp0_clks R8A7779_CLK_TMU0>;
133-
clock-names = "fck";
134-
power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
135-
#renesas,channels = <3>;
125+
compatible = "renesas,tmu-r8a7779", "renesas,tmu";
126+
reg = <0xffd80000 0x30>;
127+
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
128+
<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
129+
<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
130+
<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
131+
interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2";
132+
clocks = <&mstp0_clks R8A7779_CLK_TMU0>;
133+
clock-names = "fck";
134+
power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
135+
#renesas,channels = <3>;
136136
};

‎Documentation/devicetree/bindings/timer/renesas,tpu.yaml

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -49,8 +49,8 @@ additionalProperties: false
4949
examples:
5050
- |
5151
tpu: tpu@ffffe0 {
52-
compatible = "renesas,tpu";
53-
reg = <0xffffe0 16>, <0xfffff0 12>;
54-
clocks = <&pclk>;
55-
clock-names = "fck";
52+
compatible = "renesas,tpu";
53+
reg = <0xffffe0 16>, <0xfffff0 12>;
54+
clocks = <&pclk>;
55+
clock-names = "fck";
5656
};

‎Documentation/devicetree/bindings/timer/sifive,clint.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -77,6 +77,6 @@ examples:
7777
<&cpu2intc 3>, <&cpu2intc 7>,
7878
<&cpu3intc 3>, <&cpu3intc 7>,
7979
<&cpu4intc 3>, <&cpu4intc 7>;
80-
reg = <0x2000000 0x10000>;
80+
reg = <0x2000000 0x10000>;
8181
};
8282
...

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