@@ -47,7 +47,7 @@ struct ws16c48_gpio {
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raw_spinlock_t lock ;
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unsigned long irq_mask ;
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unsigned long flow_mask ;
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- unsigned base ;
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+ void __iomem * base ;
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};
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static int ws16c48_gpio_get_direction (struct gpio_chip * chip , unsigned offset )
@@ -73,7 +73,7 @@ static int ws16c48_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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ws16c48gpio -> io_state [port ] |= mask ;
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ws16c48gpio -> out_state [port ] &= ~mask ;
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- outb (ws16c48gpio -> out_state [port ], ws16c48gpio -> base + port );
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+ iowrite8 (ws16c48gpio -> out_state [port ], ws16c48gpio -> base + port );
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raw_spin_unlock_irqrestore (& ws16c48gpio -> lock , flags );
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@@ -95,7 +95,7 @@ static int ws16c48_gpio_direction_output(struct gpio_chip *chip,
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ws16c48gpio -> out_state [port ] |= mask ;
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else
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ws16c48gpio -> out_state [port ] &= ~mask ;
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- outb (ws16c48gpio -> out_state [port ], ws16c48gpio -> base + port );
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+ iowrite8 (ws16c48gpio -> out_state [port ], ws16c48gpio -> base + port );
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raw_spin_unlock_irqrestore (& ws16c48gpio -> lock , flags );
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@@ -118,7 +118,7 @@ static int ws16c48_gpio_get(struct gpio_chip *chip, unsigned offset)
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return - EINVAL ;
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}
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- port_state = inb (ws16c48gpio -> base + port );
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+ port_state = ioread8 (ws16c48gpio -> base + port );
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raw_spin_unlock_irqrestore (& ws16c48gpio -> lock , flags );
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@@ -131,15 +131,15 @@ static int ws16c48_gpio_get_multiple(struct gpio_chip *chip,
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struct ws16c48_gpio * const ws16c48gpio = gpiochip_get_data (chip );
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unsigned long offset ;
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unsigned long gpio_mask ;
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- unsigned int port_addr ;
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+ void __iomem * port_addr ;
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unsigned long port_state ;
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/* clear bits array to a clean slate */
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bitmap_zero (bits , chip -> ngpio );
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for_each_set_clump8 (offset , gpio_mask , mask , chip -> ngpio ) {
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port_addr = ws16c48gpio -> base + offset / 8 ;
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- port_state = inb (port_addr ) & gpio_mask ;
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+ port_state = ioread8 (port_addr ) & gpio_mask ;
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bitmap_set_value8 (bits , port_state , offset );
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}
@@ -166,7 +166,7 @@ static void ws16c48_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
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ws16c48gpio -> out_state [port ] |= mask ;
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else
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ws16c48gpio -> out_state [port ] &= ~mask ;
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- outb (ws16c48gpio -> out_state [port ], ws16c48gpio -> base + port );
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+ iowrite8 (ws16c48gpio -> out_state [port ], ws16c48gpio -> base + port );
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raw_spin_unlock_irqrestore (& ws16c48gpio -> lock , flags );
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}
@@ -178,7 +178,7 @@ static void ws16c48_gpio_set_multiple(struct gpio_chip *chip,
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unsigned long offset ;
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unsigned long gpio_mask ;
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size_t index ;
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- unsigned int port_addr ;
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+ void __iomem * port_addr ;
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unsigned long bitmask ;
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unsigned long flags ;
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@@ -195,7 +195,7 @@ static void ws16c48_gpio_set_multiple(struct gpio_chip *chip,
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/* update output state data and set device gpio register */
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ws16c48gpio -> out_state [index ] &= ~gpio_mask ;
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ws16c48gpio -> out_state [index ] |= bitmask ;
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- outb (ws16c48gpio -> out_state [index ], port_addr );
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+ iowrite8 (ws16c48gpio -> out_state [index ], port_addr );
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raw_spin_unlock_irqrestore (& ws16c48gpio -> lock , flags );
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}
@@ -219,10 +219,10 @@ static void ws16c48_irq_ack(struct irq_data *data)
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port_state = ws16c48gpio -> irq_mask >> (8 * port );
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- outb (0x80 , ws16c48gpio -> base + 7 );
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- outb (port_state & ~mask , ws16c48gpio -> base + 8 + port );
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- outb (port_state | mask , ws16c48gpio -> base + 8 + port );
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- outb (0xC0 , ws16c48gpio -> base + 7 );
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+ iowrite8 (0x80 , ws16c48gpio -> base + 7 );
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+ iowrite8 (port_state & ~mask , ws16c48gpio -> base + 8 + port );
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+ iowrite8 (port_state | mask , ws16c48gpio -> base + 8 + port );
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+ iowrite8 (0xC0 , ws16c48gpio -> base + 7 );
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raw_spin_unlock_irqrestore (& ws16c48gpio -> lock , flags );
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}
@@ -244,9 +244,9 @@ static void ws16c48_irq_mask(struct irq_data *data)
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ws16c48gpio -> irq_mask &= ~mask ;
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- outb (0x80 , ws16c48gpio -> base + 7 );
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- outb (ws16c48gpio -> irq_mask >> (8 * port ), ws16c48gpio -> base + 8 + port );
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- outb (0xC0 , ws16c48gpio -> base + 7 );
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+ iowrite8 (0x80 , ws16c48gpio -> base + 7 );
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+ iowrite8 (ws16c48gpio -> irq_mask >> (8 * port ), ws16c48gpio -> base + 8 + port );
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+ iowrite8 (0xC0 , ws16c48gpio -> base + 7 );
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raw_spin_unlock_irqrestore (& ws16c48gpio -> lock , flags );
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}
@@ -268,9 +268,9 @@ static void ws16c48_irq_unmask(struct irq_data *data)
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ws16c48gpio -> irq_mask |= mask ;
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- outb (0x80 , ws16c48gpio -> base + 7 );
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- outb (ws16c48gpio -> irq_mask >> (8 * port ), ws16c48gpio -> base + 8 + port );
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- outb (0xC0 , ws16c48gpio -> base + 7 );
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+ iowrite8 (0x80 , ws16c48gpio -> base + 7 );
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+ iowrite8 (ws16c48gpio -> irq_mask >> (8 * port ), ws16c48gpio -> base + 8 + port );
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+ iowrite8 (0xC0 , ws16c48gpio -> base + 7 );
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raw_spin_unlock_irqrestore (& ws16c48gpio -> lock , flags );
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}
@@ -304,9 +304,9 @@ static int ws16c48_irq_set_type(struct irq_data *data, unsigned flow_type)
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return - EINVAL ;
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}
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- outb (0x40 , ws16c48gpio -> base + 7 );
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- outb (ws16c48gpio -> flow_mask >> (8 * port ), ws16c48gpio -> base + 8 + port );
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- outb (0xC0 , ws16c48gpio -> base + 7 );
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+ iowrite8 (0x40 , ws16c48gpio -> base + 7 );
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+ iowrite8 (ws16c48gpio -> flow_mask >> (8 * port ), ws16c48gpio -> base + 8 + port );
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+ iowrite8 (0xC0 , ws16c48gpio -> base + 7 );
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raw_spin_unlock_irqrestore (& ws16c48gpio -> lock , flags );
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@@ -330,20 +330,20 @@ static irqreturn_t ws16c48_irq_handler(int irq, void *dev_id)
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unsigned long int_id ;
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unsigned long gpio ;
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- int_pending = inb (ws16c48gpio -> base + 6 ) & 0x7 ;
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+ int_pending = ioread8 (ws16c48gpio -> base + 6 ) & 0x7 ;
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if (!int_pending )
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return IRQ_NONE ;
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/* loop until all pending interrupts are handled */
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do {
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for_each_set_bit (port , & int_pending , 3 ) {
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- int_id = inb (ws16c48gpio -> base + 8 + port );
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+ int_id = ioread8 (ws16c48gpio -> base + 8 + port );
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for_each_set_bit (gpio , & int_id , 8 )
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generic_handle_domain_irq (chip -> irq .domain ,
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gpio + 8 * port );
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}
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- int_pending = inb (ws16c48gpio -> base + 6 ) & 0x7 ;
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+ int_pending = ioread8 (ws16c48gpio -> base + 6 ) & 0x7 ;
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} while (int_pending );
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return IRQ_HANDLED ;
@@ -370,11 +370,11 @@ static int ws16c48_irq_init_hw(struct gpio_chip *gc)
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struct ws16c48_gpio * const ws16c48gpio = gpiochip_get_data (gc );
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/* Disable IRQ by default */
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- outb (0x80 , ws16c48gpio -> base + 7 );
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- outb (0 , ws16c48gpio -> base + 8 );
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- outb (0 , ws16c48gpio -> base + 9 );
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- outb (0 , ws16c48gpio -> base + 10 );
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- outb (0xC0 , ws16c48gpio -> base + 7 );
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+ iowrite8 (0x80 , ws16c48gpio -> base + 7 );
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+ iowrite8 (0 , ws16c48gpio -> base + 8 );
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+ iowrite8 (0 , ws16c48gpio -> base + 9 );
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+ iowrite8 (0 , ws16c48gpio -> base + 10 );
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+ iowrite8 (0xC0 , ws16c48gpio -> base + 7 );
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return 0 ;
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}
@@ -396,6 +396,10 @@ static int ws16c48_probe(struct device *dev, unsigned int id)
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return - EBUSY ;
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}
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+ ws16c48gpio -> base = devm_ioport_map (dev , base [id ], WS16C48_EXTENT );
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+ if (!ws16c48gpio -> base )
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+ return - ENOMEM ;
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+
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ws16c48gpio -> chip .label = name ;
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ws16c48gpio -> chip .parent = dev ;
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ws16c48gpio -> chip .owner = THIS_MODULE ;
@@ -409,7 +413,6 @@ static int ws16c48_probe(struct device *dev, unsigned int id)
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ws16c48gpio -> chip .get_multiple = ws16c48_gpio_get_multiple ;
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ws16c48gpio -> chip .set = ws16c48_gpio_set ;
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ws16c48gpio -> chip .set_multiple = ws16c48_gpio_set_multiple ;
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- ws16c48gpio -> base = base [id ];
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girq = & ws16c48gpio -> chip .irq ;
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girq -> chip = & ws16c48_irqchip ;
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