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stephan-ghandersson
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firmware: qcom: scm: Add support for MC boot address API
It looks like the old QCOM_SCM_BOOT_SET_ADDR API is broken on some MSM8916 firmware versions that implement the newer SMC32 calling convention. It just returns -EINVAL no matter which arguments are being passed. This does not cause any problems downstream because it first tries to use the new multi-cluster API replacement which is working fine. Implement support for the multi-cluster variant of the SCM call by attempting it first but still fallback to the old call in case of an error. Also, to be absolutely sure only use the multi-cluster variant with the SMC calling convention since older platforms should not need this. Signed-off-by: Stephan Gerhold <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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-17
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drivers/firmware/qcom_scm.c

Lines changed: 67 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,8 @@
1717
#include <linux/reset-controller.h>
1818
#include <linux/arm-smccc.h>
1919

20+
#include <asm/smp_plat.h>
21+
2022
#include "qcom_scm.h"
2123

2224
static bool download_mode = IS_ENABLED(CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT);
@@ -260,15 +262,36 @@ static bool __qcom_scm_is_call_available(struct device *dev, u32 svc_id,
260262
return ret ? false : !!res.result[0];
261263
}
262264

263-
/**
264-
* qcom_scm_set_warm_boot_addr() - Set the warm boot address for cpus
265-
* @entry: Entry point function for the cpus
266-
* @cpus: The cpumask of cpus that will use the entry point
267-
*
268-
* Set the Linux entry point for the SCM to transfer control to when coming
269-
* out of a power down. CPU power down may be executed on cpuidle or hotplug.
270-
*/
271-
int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
265+
static int __qcom_scm_set_boot_addr_mc(void *entry, const cpumask_t *cpus,
266+
unsigned int flags)
267+
{
268+
struct qcom_scm_desc desc = {
269+
.svc = QCOM_SCM_SVC_BOOT,
270+
.cmd = QCOM_SCM_BOOT_SET_ADDR_MC,
271+
.owner = ARM_SMCCC_OWNER_SIP,
272+
.arginfo = QCOM_SCM_ARGS(6),
273+
};
274+
unsigned int cpu;
275+
u64 map;
276+
277+
/* Need a device for DMA of the additional arguments */
278+
if (!__scm || __get_convention() == SMC_CONVENTION_LEGACY)
279+
return -EOPNOTSUPP;
280+
281+
desc.args[0] = virt_to_phys(entry);
282+
for_each_cpu(cpu, cpus) {
283+
map = cpu_logical_map(cpu);
284+
desc.args[1] |= BIT(MPIDR_AFFINITY_LEVEL(map, 0));
285+
desc.args[2] |= BIT(MPIDR_AFFINITY_LEVEL(map, 1));
286+
desc.args[3] |= BIT(MPIDR_AFFINITY_LEVEL(map, 2));
287+
}
288+
desc.args[4] = ~0ULL; /* Reserved for affinity level 3 */
289+
desc.args[5] = flags;
290+
291+
return qcom_scm_call(__scm->dev, &desc, NULL);
292+
}
293+
294+
static int __qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
272295
{
273296
int ret;
274297
int flags = 0;
@@ -304,17 +327,28 @@ int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
304327

305328
return ret;
306329
}
307-
EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr);
308330

309331
/**
310-
* qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus
332+
* qcom_scm_set_warm_boot_addr() - Set the warm boot address for cpus
311333
* @entry: Entry point function for the cpus
312334
* @cpus: The cpumask of cpus that will use the entry point
313335
*
314-
* Set the cold boot address of the cpus. Any cpu outside the supported
315-
* range would be removed from the cpu present mask.
336+
* Set the Linux entry point for the SCM to transfer control to when coming
337+
* out of a power down. CPU power down may be executed on cpuidle or hotplug.
316338
*/
317-
int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
339+
int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
340+
{
341+
if (!cpus || cpumask_empty(cpus))
342+
return -EINVAL;
343+
344+
if (__qcom_scm_set_boot_addr_mc(entry, cpus, QCOM_SCM_BOOT_MC_FLAG_WARMBOOT))
345+
/* Fallback to old SCM call */
346+
return __qcom_scm_set_warm_boot_addr(entry, cpus);
347+
return 0;
348+
}
349+
EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr);
350+
351+
static int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
318352
{
319353
int flags = 0;
320354
int cpu;
@@ -331,9 +365,6 @@ int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
331365
.owner = ARM_SMCCC_OWNER_SIP,
332366
};
333367

334-
if (!cpus || cpumask_empty(cpus))
335-
return -EINVAL;
336-
337368
for_each_cpu(cpu, cpus) {
338369
if (cpu < ARRAY_SIZE(scm_cb_flags))
339370
flags |= scm_cb_flags[cpu];
@@ -346,6 +377,25 @@ int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
346377

347378
return qcom_scm_call_atomic(__scm ? __scm->dev : NULL, &desc, NULL);
348379
}
380+
381+
/**
382+
* qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus
383+
* @entry: Entry point function for the cpus
384+
* @cpus: The cpumask of cpus that will use the entry point
385+
*
386+
* Set the cold boot address of the cpus. Any cpu outside the supported
387+
* range would be removed from the cpu present mask.
388+
*/
389+
int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
390+
{
391+
if (!cpus || cpumask_empty(cpus))
392+
return -EINVAL;
393+
394+
if (__qcom_scm_set_boot_addr_mc(entry, cpus, QCOM_SCM_BOOT_MC_FLAG_COLDBOOT))
395+
/* Fallback to old SCM call */
396+
return __qcom_scm_set_cold_boot_addr(entry, cpus);
397+
return 0;
398+
}
349399
EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr);
350400

351401
/**

drivers/firmware/qcom_scm.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -78,8 +78,12 @@ extern int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc,
7878
#define QCOM_SCM_BOOT_SET_ADDR 0x01
7979
#define QCOM_SCM_BOOT_TERMINATE_PC 0x02
8080
#define QCOM_SCM_BOOT_SET_DLOAD_MODE 0x10
81+
#define QCOM_SCM_BOOT_SET_ADDR_MC 0x11
8182
#define QCOM_SCM_BOOT_SET_REMOTE_STATE 0x0a
8283
#define QCOM_SCM_FLUSH_FLAG_MASK 0x3
84+
#define QCOM_SCM_BOOT_MC_FLAG_AARCH64 BIT(0)
85+
#define QCOM_SCM_BOOT_MC_FLAG_COLDBOOT BIT(1)
86+
#define QCOM_SCM_BOOT_MC_FLAG_WARMBOOT BIT(2)
8387

8488
#define QCOM_SCM_SVC_PIL 0x02
8589
#define QCOM_SCM_PIL_PAS_INIT_IMAGE 0x01

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