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Merge tag 'qcom-arm64-fixes-for-6.12-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into HEAD
More Qualcomm Arm64 DeviceTree fixes for v6.12 Bring a range of PCIe fixes across the X Elite platform, as well as marking the NVMe power supply boot-on to avoid glitching the power supply during boot. The X Elite CRD audio configuration sees a spelling mistake corrected. On SM8450 the PCIe 1 PIPE clock definition is corrected, to fix a regression where this isn't able to acquire it's clocks. * tag 'qcom-arm64-fixes-for-6.12-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: dts: qcom: x1e80100: fix PCIe5 interconnect arm64: dts: qcom: x1e80100: fix PCIe4 interconnect arm64: dts: qcom: x1e80100: Fix up BAR spaces arm64: dts: qcom: x1e80100-qcp: fix nvme regulator boot glitch arm64: dts: qcom: x1e80100-microsoft-romulus: fix nvme regulator boot glitch arm64: dts: qcom: x1e80100-yoga-slim7x: fix nvme regulator boot glitch arm64: dts: qcom: x1e80100-vivobook-s15: fix nvme regulator boot glitch arm64: dts: qcom: x1e80100-crd: fix nvme regulator boot glitch arm64: dts: qcom: x1e78100-t14s: fix nvme regulator boot glitch arm64: dts: qcom: x1e80100-crd Rename "Twitter" to "Tweeter" arm64: dts: qcom: x1e80100: Fix PCIe 6a lanes description arm64: dts: qcom: sm8450 fix PIPE clock specification for pcie1 arm64: dts: qcom: x1e80100: Add Broadcast_AND region in LLCC block arm64: dts: qcom: x1e80100: fix PCIe5 PHY clocks arm64: dts: qcom: x1e80100: fix PCIe4 and PCIe6a PHY clocks Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2 parents 51c4bae + 54376fe commit 566064e

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‎arch/arm64/boot/dts/qcom/sm8450.dtsi‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1973,7 +1973,7 @@
19731973

19741974
clocks = <&gcc GCC_PCIE_1_PIPE_CLK>,
19751975
<&gcc GCC_PCIE_1_PIPE_CLK_SRC>,
1976-
<&pcie1_phy>,
1976+
<&pcie1_phy QMP_PCIE_PIPE_CLK>,
19771977
<&rpmhcc RPMH_CXO_CLK>,
19781978
<&gcc GCC_PCIE_1_AUX_CLK>,
19791979
<&gcc GCC_PCIE_1_CFG_AHB_CLK>,

‎arch/arm64/boot/dts/qcom/x1e78100-lenovo-thinkpad-t14s.dts‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -139,6 +139,8 @@
139139

140140
pinctrl-0 = <&nvme_reg_en>;
141141
pinctrl-names = "default";
142+
143+
regulator-boot-on;
142144
};
143145

144146
vph_pwr: regulator-vph-pwr {

‎arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -134,6 +134,8 @@
134134

135135
pinctrl-0 = <&nvme_reg_en>;
136136
pinctrl-names = "default";
137+
138+
regulator-boot-on;
137139
};
138140
};
139141

‎arch/arm64/boot/dts/qcom/x1e80100-crd.dts‎

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -177,9 +177,9 @@
177177
compatible = "qcom,x1e80100-sndcard";
178178
model = "X1E80100-CRD";
179179
audio-routing = "WooferLeft IN", "WSA WSA_SPK1 OUT",
180-
"TwitterLeft IN", "WSA WSA_SPK2 OUT",
180+
"TweeterLeft IN", "WSA WSA_SPK2 OUT",
181181
"WooferRight IN", "WSA2 WSA_SPK2 OUT",
182-
"TwitterRight IN", "WSA2 WSA_SPK2 OUT",
182+
"TweeterRight IN", "WSA2 WSA_SPK2 OUT",
183183
"IN1_HPHL", "HPHL_OUT",
184184
"IN2_HPHR", "HPHR_OUT",
185185
"AMIC2", "MIC BIAS2",
@@ -300,6 +300,8 @@
300300

301301
pinctrl-names = "default";
302302
pinctrl-0 = <&nvme_reg_en>;
303+
304+
regulator-boot-on;
303305
};
304306

305307
vreg_wwan: regulator-wwan {
@@ -933,7 +935,7 @@
933935
reg = <0 1>;
934936
reset-gpios = <&lpass_tlmm 12 GPIO_ACTIVE_LOW>;
935937
#sound-dai-cells = <0>;
936-
sound-name-prefix = "TwitterLeft";
938+
sound-name-prefix = "TweeterLeft";
937939
vdd-1p8-supply = <&vreg_l15b_1p8>;
938940
vdd-io-supply = <&vreg_l12b_1p2>;
939941
qcom,port-mapping = <4 5 6 7 11 13>;
@@ -986,7 +988,7 @@
986988
reg = <0 1>;
987989
reset-gpios = <&lpass_tlmm 13 GPIO_ACTIVE_LOW>;
988990
#sound-dai-cells = <0>;
989-
sound-name-prefix = "TwitterRight";
991+
sound-name-prefix = "TweeterRight";
990992
vdd-1p8-supply = <&vreg_l15b_1p8>;
991993
vdd-io-supply = <&vreg_l12b_1p2>;
992994
qcom,port-mapping = <4 5 6 7 11 13>;

‎arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -205,6 +205,8 @@
205205

206206
pinctrl-0 = <&nvme_reg_en>;
207207
pinctrl-names = "default";
208+
209+
regulator-boot-on;
208210
};
209211
};
210212

‎arch/arm64/boot/dts/qcom/x1e80100-microsoft-romulus.dtsi‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -164,6 +164,8 @@
164164

165165
pinctrl-0 = <&nvme_reg_en>;
166166
pinctrl-names = "default";
167+
168+
regulator-boot-on;
167169
};
168170
};
169171

‎arch/arm64/boot/dts/qcom/x1e80100-qcp.dts‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -253,6 +253,8 @@
253253

254254
pinctrl-names = "default";
255255
pinctrl-0 = <&nvme_reg_en>;
256+
257+
regulator-boot-on;
256258
};
257259
};
258260

‎arch/arm64/boot/dts/qcom/x1e80100.dtsi‎

Lines changed: 32 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -2924,14 +2924,14 @@
29242924
"mhi";
29252925
#address-cells = <3>;
29262926
#size-cells = <2>;
2927-
ranges = <0x01000000 0 0x00000000 0 0x70200000 0 0x100000>,
2928-
<0x02000000 0 0x70300000 0 0x70300000 0 0x3d00000>;
2929-
bus-range = <0 0xff>;
2927+
ranges = <0x01000000 0x0 0x00000000 0x0 0x70200000 0x0 0x100000>,
2928+
<0x02000000 0x0 0x70300000 0x0 0x70300000 0x0 0x1d00000>;
2929+
bus-range = <0x00 0xff>;
29302930

29312931
dma-coherent;
29322932

29332933
linux,pci-domain = <6>;
2934-
num-lanes = <2>;
2934+
num-lanes = <4>;
29352935

29362936
interrupts = <GIC_SPI 773 IRQ_TYPE_LEVEL_HIGH>,
29372937
<GIC_SPI 774 IRQ_TYPE_LEVEL_HIGH>,
@@ -2997,19 +2997,22 @@
29972997
};
29982998

29992999
pcie6a_phy: phy@1bfc000 {
3000-
compatible = "qcom,x1e80100-qmp-gen4x2-pcie-phy";
3001-
reg = <0 0x01bfc000 0 0x2000>;
3000+
compatible = "qcom,x1e80100-qmp-gen4x4-pcie-phy";
3001+
reg = <0 0x01bfc000 0 0x2000>,
3002+
<0 0x01bfe000 0 0x2000>;
30023003

30033004
clocks = <&gcc GCC_PCIE_6A_PHY_AUX_CLK>,
30043005
<&gcc GCC_PCIE_6A_CFG_AHB_CLK>,
3005-
<&rpmhcc RPMH_CXO_CLK>,
3006+
<&tcsr TCSR_PCIE_4L_CLKREF_EN>,
30063007
<&gcc GCC_PCIE_6A_PHY_RCHNG_CLK>,
3007-
<&gcc GCC_PCIE_6A_PIPE_CLK>;
3008+
<&gcc GCC_PCIE_6A_PIPE_CLK>,
3009+
<&gcc GCC_PCIE_6A_PIPEDIV2_CLK>;
30083010
clock-names = "aux",
30093011
"cfg_ahb",
30103012
"ref",
30113013
"rchng",
3012-
"pipe";
3014+
"pipe",
3015+
"pipediv2";
30133016

30143017
resets = <&gcc GCC_PCIE_6A_PHY_BCR>,
30153018
<&gcc GCC_PCIE_6A_NOCSR_COM_PHY_BCR>;
@@ -3021,6 +3024,8 @@
30213024

30223025
power-domains = <&gcc GCC_PCIE_6_PHY_GDSC>;
30233026

3027+
qcom,4ln-config-sel = <&tcsr 0x1a000 0>;
3028+
30243029
#clock-cells = <0>;
30253030
clock-output-names = "pcie6a_pipe_clk";
30263031

@@ -3097,7 +3102,7 @@
30973102
assigned-clocks = <&gcc GCC_PCIE_5_AUX_CLK>;
30983103
assigned-clock-rates = <19200000>;
30993104

3100-
interconnects = <&pcie_south_anoc MASTER_PCIE_5 QCOM_ICC_TAG_ALWAYS
3105+
interconnects = <&pcie_north_anoc MASTER_PCIE_5 QCOM_ICC_TAG_ALWAYS
31013106
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
31023107
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
31033108
&cnoc_main SLAVE_PCIE_5 QCOM_ICC_TAG_ALWAYS>;
@@ -3124,14 +3129,16 @@
31243129

31253130
clocks = <&gcc GCC_PCIE_5_AUX_CLK>,
31263131
<&gcc GCC_PCIE_5_CFG_AHB_CLK>,
3127-
<&rpmhcc RPMH_CXO_CLK>,
3132+
<&tcsr TCSR_PCIE_2L_5_CLKREF_EN>,
31283133
<&gcc GCC_PCIE_5_PHY_RCHNG_CLK>,
3129-
<&gcc GCC_PCIE_5_PIPE_CLK>;
3134+
<&gcc GCC_PCIE_5_PIPE_CLK>,
3135+
<&gcc GCC_PCIE_5_PIPEDIV2_CLK>;
31303136
clock-names = "aux",
31313137
"cfg_ahb",
31323138
"ref",
31333139
"rchng",
3134-
"pipe";
3140+
"pipe",
3141+
"pipediv2";
31353142

31363143
resets = <&gcc GCC_PCIE_5_PHY_BCR>;
31373144
reset-names = "phy";
@@ -3166,8 +3173,8 @@
31663173
"mhi";
31673174
#address-cells = <3>;
31683175
#size-cells = <2>;
3169-
ranges = <0x01000000 0 0x00000000 0 0x7c200000 0 0x100000>,
3170-
<0x02000000 0 0x7c300000 0 0x7c300000 0 0x3d00000>;
3176+
ranges = <0x01000000 0x0 0x00000000 0x0 0x7c200000 0x0 0x100000>,
3177+
<0x02000000 0x0 0x7c300000 0x0 0x7c300000 0x0 0x1d00000>;
31713178
bus-range = <0x00 0xff>;
31723179

31733180
dma-coherent;
@@ -3217,7 +3224,7 @@
32173224
assigned-clocks = <&gcc GCC_PCIE_4_AUX_CLK>;
32183225
assigned-clock-rates = <19200000>;
32193226

3220-
interconnects = <&pcie_south_anoc MASTER_PCIE_4 QCOM_ICC_TAG_ALWAYS
3227+
interconnects = <&pcie_north_anoc MASTER_PCIE_4 QCOM_ICC_TAG_ALWAYS
32213228
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
32223229
<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
32233230
&cnoc_main SLAVE_PCIE_4 QCOM_ICC_TAG_ALWAYS>;
@@ -3254,14 +3261,16 @@
32543261

32553262
clocks = <&gcc GCC_PCIE_4_AUX_CLK>,
32563263
<&gcc GCC_PCIE_4_CFG_AHB_CLK>,
3257-
<&rpmhcc RPMH_CXO_CLK>,
3264+
<&tcsr TCSR_PCIE_2L_4_CLKREF_EN>,
32583265
<&gcc GCC_PCIE_4_PHY_RCHNG_CLK>,
3259-
<&gcc GCC_PCIE_4_PIPE_CLK>;
3266+
<&gcc GCC_PCIE_4_PIPE_CLK>,
3267+
<&gcc GCC_PCIE_4_PIPEDIV2_CLK>;
32603268
clock-names = "aux",
32613269
"cfg_ahb",
32623270
"ref",
32633271
"rchng",
3264-
"pipe";
3272+
"pipe",
3273+
"pipediv2";
32653274

32663275
resets = <&gcc GCC_PCIE_4_PHY_BCR>;
32673276
reset-names = "phy";
@@ -6084,7 +6093,8 @@
60846093
<0 0x25a00000 0 0x200000>,
60856094
<0 0x25c00000 0 0x200000>,
60866095
<0 0x25e00000 0 0x200000>,
6087-
<0 0x26000000 0 0x200000>;
6096+
<0 0x26000000 0 0x200000>,
6097+
<0 0x26200000 0 0x200000>;
60886098
reg-names = "llcc0_base",
60896099
"llcc1_base",
60906100
"llcc2_base",
@@ -6093,7 +6103,8 @@
60936103
"llcc5_base",
60946104
"llcc6_base",
60956105
"llcc7_base",
6096-
"llcc_broadcast_base";
6106+
"llcc_broadcast_base",
6107+
"llcc_broadcast_and_base";
60976108
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
60986109
};
60996110

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