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293 | 293 | ranges;
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294 | 294 |
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295 | 295 | sai2: sai@30020000 {
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296 |
| - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; |
| 296 | + compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; |
297 | 297 | reg = <0x30020000 0x10000>;
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298 | 298 | interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
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299 | 299 | clocks = <&clk IMX8MN_CLK_SAI2_IPG>,
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307 | 307 | };
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308 | 308 |
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309 | 309 | sai3: sai@30030000 {
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310 |
| - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; |
| 310 | + compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; |
311 | 311 | reg = <0x30030000 0x10000>;
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312 | 312 | interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
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313 | 313 | clocks = <&clk IMX8MN_CLK_SAI3_IPG>,
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321 | 321 | };
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322 | 322 |
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323 | 323 | sai5: sai@30050000 {
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324 |
| - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; |
| 324 | + compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; |
325 | 325 | reg = <0x30050000 0x10000>;
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326 | 326 | interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
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327 | 327 | clocks = <&clk IMX8MN_CLK_SAI5_IPG>,
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337 | 337 | };
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338 | 338 |
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339 | 339 | sai6: sai@30060000 {
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340 |
| - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; |
| 340 | + compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; |
341 | 341 | reg = <0x30060000 0x10000>;
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342 | 342 | interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
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343 | 343 | clocks = <&clk IMX8MN_CLK_SAI6_IPG>,
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394 | 394 | };
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395 | 395 |
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396 | 396 | sai7: sai@300b0000 {
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397 |
| - compatible = "fsl,imx8mm-sai", "fsl,imx8mq-sai"; |
| 397 | + compatible = "fsl,imx8mn-sai", "fsl,imx8mq-sai"; |
398 | 398 | reg = <0x300b0000 0x10000>;
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399 | 399 | interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
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400 | 400 | clocks = <&clk IMX8MN_CLK_SAI7_IPG>,
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