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fancerbroonie
fancer
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spi: dw: Cleanup generic DW DMA code namings
Since from now the former Intel MID platform layer is used as a generic DW SPI DMA module, let's alter the internal methods naming to be DMA-related instead of having the "mid_" prefix. Co-developed-by: Georgy Vlasov <[email protected]> Co-developed-by: Ramil Zaripov <[email protected]> Signed-off-by: Georgy Vlasov <[email protected]> Signed-off-by: Ramil Zaripov <[email protected]> Signed-off-by: Serge Semin <[email protected]> Reviewed-by: Andy Shevchenko <[email protected]> Cc: Alexey Malahov <[email protected]> Cc: Thomas Bogendoerfer <[email protected]> Cc: Arnd Bergmann <[email protected]> Cc: Feng Tang <[email protected]> Cc: Rob Herring <[email protected]> Cc: [email protected] Cc: [email protected] Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
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‎drivers/spi/spi-dw-dma.c

Lines changed: 43 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@
2323
#define TX_BUSY 1
2424
#define TX_BURST_LEVEL 16
2525

26-
static bool mid_spi_dma_chan_filter(struct dma_chan *chan, void *param)
26+
static bool dw_spi_dma_chan_filter(struct dma_chan *chan, void *param)
2727
{
2828
struct dw_dma_slave *s = param;
2929

@@ -34,7 +34,7 @@ static bool mid_spi_dma_chan_filter(struct dma_chan *chan, void *param)
3434
return true;
3535
}
3636

37-
static void mid_spi_maxburst_init(struct dw_spi *dws)
37+
static void dw_spi_dma_maxburst_init(struct dw_spi *dws)
3838
{
3939
struct dma_slave_caps caps;
4040
u32 max_burst, def_burst;
@@ -59,7 +59,7 @@ static void mid_spi_maxburst_init(struct dw_spi *dws)
5959
dws->txburst = min(max_burst, def_burst);
6060
}
6161

62-
static int mid_spi_dma_init_mfld(struct device *dev, struct dw_spi *dws)
62+
static int dw_spi_dma_init_mfld(struct device *dev, struct dw_spi *dws)
6363
{
6464
struct dw_dma_slave slave = {
6565
.src_id = 0,
@@ -81,13 +81,13 @@ static int mid_spi_dma_init_mfld(struct device *dev, struct dw_spi *dws)
8181

8282
/* 1. Init rx channel */
8383
slave.dma_dev = &dma_dev->dev;
84-
dws->rxchan = dma_request_channel(mask, mid_spi_dma_chan_filter, &slave);
84+
dws->rxchan = dma_request_channel(mask, dw_spi_dma_chan_filter, &slave);
8585
if (!dws->rxchan)
8686
goto err_exit;
8787

8888
/* 2. Init tx channel */
8989
slave.dst_id = 1;
90-
dws->txchan = dma_request_channel(mask, mid_spi_dma_chan_filter, &slave);
90+
dws->txchan = dma_request_channel(mask, dw_spi_dma_chan_filter, &slave);
9191
if (!dws->txchan)
9292
goto free_rxchan;
9393

@@ -96,7 +96,7 @@ static int mid_spi_dma_init_mfld(struct device *dev, struct dw_spi *dws)
9696

9797
init_completion(&dws->dma_completion);
9898

99-
mid_spi_maxburst_init(dws);
99+
dw_spi_dma_maxburst_init(dws);
100100

101101
return 0;
102102

@@ -107,7 +107,7 @@ static int mid_spi_dma_init_mfld(struct device *dev, struct dw_spi *dws)
107107
return -EBUSY;
108108
}
109109

110-
static int mid_spi_dma_init_generic(struct device *dev, struct dw_spi *dws)
110+
static int dw_spi_dma_init_generic(struct device *dev, struct dw_spi *dws)
111111
{
112112
dws->rxchan = dma_request_slave_channel(dev, "rx");
113113
if (!dws->rxchan)
@@ -125,12 +125,12 @@ static int mid_spi_dma_init_generic(struct device *dev, struct dw_spi *dws)
125125

126126
init_completion(&dws->dma_completion);
127127

128-
mid_spi_maxburst_init(dws);
128+
dw_spi_dma_maxburst_init(dws);
129129

130130
return 0;
131131
}
132132

133-
static void mid_spi_dma_exit(struct dw_spi *dws)
133+
static void dw_spi_dma_exit(struct dw_spi *dws)
134134
{
135135
if (dws->txchan) {
136136
dmaengine_terminate_sync(dws->txchan);
@@ -145,7 +145,7 @@ static void mid_spi_dma_exit(struct dw_spi *dws)
145145
dw_writel(dws, DW_SPI_DMACR, 0);
146146
}
147147

148-
static irqreturn_t dma_transfer(struct dw_spi *dws)
148+
static irqreturn_t dw_spi_dma_transfer_handler(struct dw_spi *dws)
149149
{
150150
u16 irq_status = dw_readl(dws, DW_SPI_ISR);
151151

@@ -161,15 +161,16 @@ static irqreturn_t dma_transfer(struct dw_spi *dws)
161161
return IRQ_HANDLED;
162162
}
163163

164-
static bool mid_spi_can_dma(struct spi_controller *master,
165-
struct spi_device *spi, struct spi_transfer *xfer)
164+
static bool dw_spi_can_dma(struct spi_controller *master,
165+
struct spi_device *spi, struct spi_transfer *xfer)
166166
{
167167
struct dw_spi *dws = spi_controller_get_devdata(master);
168168

169169
return xfer->len > dws->fifo_len;
170170
}
171171

172-
static enum dma_slave_buswidth convert_dma_width(u8 n_bytes) {
172+
static enum dma_slave_buswidth dw_spi_dma_convert_width(u8 n_bytes)
173+
{
173174
if (n_bytes == 1)
174175
return DMA_SLAVE_BUSWIDTH_1_BYTE;
175176
else if (n_bytes == 2)
@@ -244,8 +245,8 @@ static void dw_spi_dma_tx_done(void *arg)
244245
complete(&dws->dma_completion);
245246
}
246247

247-
static struct dma_async_tx_descriptor *dw_spi_dma_prepare_tx(struct dw_spi *dws,
248-
struct spi_transfer *xfer)
248+
static struct dma_async_tx_descriptor *
249+
dw_spi_dma_prepare_tx(struct dw_spi *dws, struct spi_transfer *xfer)
249250
{
250251
struct dma_slave_config txconf;
251252
struct dma_async_tx_descriptor *txdesc;
@@ -258,7 +259,7 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_tx(struct dw_spi *dws,
258259
txconf.dst_addr = dws->dma_addr;
259260
txconf.dst_maxburst = dws->txburst;
260261
txconf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
261-
txconf.dst_addr_width = convert_dma_width(dws->n_bytes);
262+
txconf.dst_addr_width = dw_spi_dma_convert_width(dws->n_bytes);
262263
txconf.device_fc = false;
263264

264265
dmaengine_slave_config(dws->txchan, &txconf);
@@ -350,7 +351,7 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_rx(struct dw_spi *dws,
350351
rxconf.src_addr = dws->dma_addr;
351352
rxconf.src_maxburst = dws->rxburst;
352353
rxconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
353-
rxconf.src_addr_width = convert_dma_width(dws->n_bytes);
354+
rxconf.src_addr_width = dw_spi_dma_convert_width(dws->n_bytes);
354355
rxconf.device_fc = false;
355356

356357
dmaengine_slave_config(dws->rxchan, &rxconf);
@@ -369,7 +370,7 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_rx(struct dw_spi *dws,
369370
return rxdesc;
370371
}
371372

372-
static int mid_spi_dma_setup(struct dw_spi *dws, struct spi_transfer *xfer)
373+
static int dw_spi_dma_setup(struct dw_spi *dws, struct spi_transfer *xfer)
373374
{
374375
u16 imr = 0, dma_ctrl = 0;
375376

@@ -391,12 +392,12 @@ static int mid_spi_dma_setup(struct dw_spi *dws, struct spi_transfer *xfer)
391392

392393
reinit_completion(&dws->dma_completion);
393394

394-
dws->transfer_handler = dma_transfer;
395+
dws->transfer_handler = dw_spi_dma_transfer_handler;
395396

396397
return 0;
397398
}
398399

399-
static int mid_spi_dma_transfer(struct dw_spi *dws, struct spi_transfer *xfer)
400+
static int dw_spi_dma_transfer(struct dw_spi *dws, struct spi_transfer *xfer)
400401
{
401402
struct dma_async_tx_descriptor *txdesc, *rxdesc;
402403
int ret;
@@ -436,7 +437,7 @@ static int mid_spi_dma_transfer(struct dw_spi *dws, struct spi_transfer *xfer)
436437
return ret;
437438
}
438439

439-
static void mid_spi_dma_stop(struct dw_spi *dws)
440+
static void dw_spi_dma_stop(struct dw_spi *dws)
440441
{
441442
if (test_bit(TX_BUSY, &dws->dma_chan_busy)) {
442443
dmaengine_terminate_sync(dws->txchan);
@@ -450,32 +451,32 @@ static void mid_spi_dma_stop(struct dw_spi *dws)
450451
dw_writel(dws, DW_SPI_DMACR, 0);
451452
}
452453

453-
static const struct dw_spi_dma_ops mfld_dma_ops = {
454-
.dma_init = mid_spi_dma_init_mfld,
455-
.dma_exit = mid_spi_dma_exit,
456-
.dma_setup = mid_spi_dma_setup,
457-
.can_dma = mid_spi_can_dma,
458-
.dma_transfer = mid_spi_dma_transfer,
459-
.dma_stop = mid_spi_dma_stop,
454+
static const struct dw_spi_dma_ops dw_spi_dma_mfld_ops = {
455+
.dma_init = dw_spi_dma_init_mfld,
456+
.dma_exit = dw_spi_dma_exit,
457+
.dma_setup = dw_spi_dma_setup,
458+
.can_dma = dw_spi_can_dma,
459+
.dma_transfer = dw_spi_dma_transfer,
460+
.dma_stop = dw_spi_dma_stop,
460461
};
461462

462-
void dw_spi_mid_setup_dma_mfld(struct dw_spi *dws)
463+
void dw_spi_dma_setup_mfld(struct dw_spi *dws)
463464
{
464-
dws->dma_ops = &mfld_dma_ops;
465+
dws->dma_ops = &dw_spi_dma_mfld_ops;
465466
}
466-
EXPORT_SYMBOL_GPL(dw_spi_mid_setup_dma_mfld);
467-
468-
static const struct dw_spi_dma_ops generic_dma_ops = {
469-
.dma_init = mid_spi_dma_init_generic,
470-
.dma_exit = mid_spi_dma_exit,
471-
.dma_setup = mid_spi_dma_setup,
472-
.can_dma = mid_spi_can_dma,
473-
.dma_transfer = mid_spi_dma_transfer,
474-
.dma_stop = mid_spi_dma_stop,
467+
EXPORT_SYMBOL_GPL(dw_spi_dma_setup_mfld);
468+
469+
static const struct dw_spi_dma_ops dw_spi_dma_generic_ops = {
470+
.dma_init = dw_spi_dma_init_generic,
471+
.dma_exit = dw_spi_dma_exit,
472+
.dma_setup = dw_spi_dma_setup,
473+
.can_dma = dw_spi_can_dma,
474+
.dma_transfer = dw_spi_dma_transfer,
475+
.dma_stop = dw_spi_dma_stop,
475476
};
476477

477-
void dw_spi_mid_setup_dma_generic(struct dw_spi *dws)
478+
void dw_spi_dma_setup_generic(struct dw_spi *dws)
478479
{
479-
dws->dma_ops = &generic_dma_ops;
480+
dws->dma_ops = &dw_spi_dma_generic_ops;
480481
}
481-
EXPORT_SYMBOL_GPL(dw_spi_mid_setup_dma_generic);
482+
EXPORT_SYMBOL_GPL(dw_spi_dma_setup_generic);

‎drivers/spi/spi-dw-pci.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -51,7 +51,7 @@ static int spi_mid_init(struct dw_spi *dws)
5151
/* Register hook to configure CTRLR0 */
5252
dws->update_cr0 = dw_spi_update_cr0;
5353

54-
dw_spi_mid_setup_dma_mfld(dws);
54+
dw_spi_dma_setup_mfld(dws);
5555

5656
return 0;
5757
}
@@ -61,7 +61,7 @@ static int spi_generic_init(struct dw_spi *dws)
6161
/* Register hook to configure CTRLR0 */
6262
dws->update_cr0 = dw_spi_update_cr0;
6363

64-
dw_spi_mid_setup_dma_generic(dws);
64+
dw_spi_dma_setup_generic(dws);
6565

6666
return 0;
6767
}

‎drivers/spi/spi-dw.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -259,13 +259,13 @@ extern u32 dw_spi_update_cr0_v1_01a(struct spi_controller *master,
259259

260260
#ifdef CONFIG_SPI_DW_DMA
261261

262-
extern void dw_spi_mid_setup_dma_mfld(struct dw_spi *dws);
263-
extern void dw_spi_mid_setup_dma_generic(struct dw_spi *dws);
262+
extern void dw_spi_dma_setup_mfld(struct dw_spi *dws);
263+
extern void dw_spi_dma_setup_generic(struct dw_spi *dws);
264264

265265
#else
266266

267-
static inline void dw_spi_mid_setup_dma_mfld(struct dw_spi *dws) {}
268-
static inline void dw_spi_mid_setup_dma_generic(struct dw_spi *dws) {}
267+
static inline void dw_spi_dma_setup_mfld(struct dw_spi *dws) {}
268+
static inline void dw_spi_dma_setup_generic(struct dw_spi *dws) {}
269269

270270
#endif /* !CONFIG_SPI_DW_DMA */
271271

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