@@ -288,8 +288,7 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
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void __iomem * base ;
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int err ;
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- clk_hw_data = kzalloc (struct_size (clk_hw_data , hws ,
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- IMX8MQ_CLK_END ), GFP_KERNEL );
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+ clk_hw_data = devm_kzalloc (dev , struct_size (clk_hw_data , hws , IMX8MQ_CLK_END ), GFP_KERNEL );
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if (WARN_ON (!clk_hw_data ))
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return - ENOMEM ;
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@@ -306,10 +305,12 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
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hws [IMX8MQ_CLK_EXT4 ] = imx_get_clk_hw_by_name (np , "clk_ext4" );
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np = of_find_compatible_node (NULL , NULL , "fsl,imx8mq-anatop" );
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- base = of_iomap ( np , 0 );
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+ base = devm_of_iomap ( dev , np , 0 , NULL );
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of_node_put (np );
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- if (WARN_ON (!base ))
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- return - ENOMEM ;
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+ if (WARN_ON (IS_ERR (base ))) {
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+ err = PTR_ERR (base );
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+ goto unregister_hws ;
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+ }
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hws [IMX8MQ_ARM_PLL_REF_SEL ] = imx_clk_hw_mux ("arm_pll_ref_sel" , base + 0x28 , 16 , 2 , pll_ref_sels , ARRAY_SIZE (pll_ref_sels ));
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hws [IMX8MQ_GPU_PLL_REF_SEL ] = imx_clk_hw_mux ("gpu_pll_ref_sel" , base + 0x18 , 16 , 2 , pll_ref_sels , ARRAY_SIZE (pll_ref_sels ));
@@ -395,8 +396,10 @@ static int imx8mq_clocks_probe(struct platform_device *pdev)
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np = dev -> of_node ;
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base = devm_platform_ioremap_resource (pdev , 0 );
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- if (WARN_ON (IS_ERR (base )))
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- return PTR_ERR (base );
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+ if (WARN_ON (IS_ERR (base ))) {
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+ err = PTR_ERR (base );
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+ goto unregister_hws ;
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+ }
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/* CORE */
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hws [IMX8MQ_CLK_A53_DIV ] = imx8m_clk_hw_composite_core ("arm_a53_div" , imx8mq_a53_sels , base + 0x8000 );
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