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Akhil P Oommenrobclark
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drm: msm: a6xx: fix gpu failure after system resume
On targets where GMU is available, GMU takes over the ownership of GX GDSC during its initialization. So, move the refcount-get on GX PD before we initialize the GMU. This ensures that nobody can collapse the GX GDSC once GMU owns the GX GDSC. This patch fixes some GMU OOB errors seen during GPU wake up during a system resume. Reported-by: Matthias Kaehlcke <[email protected]> Signed-off-by: Akhil P Oommen <[email protected]> Tested-by: Matthias Kaehlcke <[email protected]> Reviewed-by: Jordan Crouse <[email protected]> Signed-off-by: Rob Clark <[email protected]>
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drivers/gpu/drm/msm/adreno/a6xx_gmu.c

Lines changed: 10 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -864,10 +864,19 @@ int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu)
864864
/* Turn on the resources */
865865
pm_runtime_get_sync(gmu->dev);
866866

867+
/*
868+
* "enable" the GX power domain which won't actually do anything but it
869+
* will make sure that the refcounting is correct in case we need to
870+
* bring down the GX after a GMU failure
871+
*/
872+
if (!IS_ERR_OR_NULL(gmu->gxpd))
873+
pm_runtime_get_sync(gmu->gxpd);
874+
867875
/* Use a known rate to bring up the GMU */
868876
clk_set_rate(gmu->core_clk, 200000000);
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ret = clk_bulk_prepare_enable(gmu->nr_clocks, gmu->clocks);
870878
if (ret) {
879+
pm_runtime_put(gmu->gxpd);
871880
pm_runtime_put(gmu->dev);
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return ret;
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}
@@ -910,19 +919,12 @@ int a6xx_gmu_resume(struct a6xx_gpu *a6xx_gpu)
910919
/* Set the GPU to the current freq */
911920
a6xx_gmu_set_initial_freq(gpu, gmu);
912921

913-
/*
914-
* "enable" the GX power domain which won't actually do anything but it
915-
* will make sure that the refcounting is correct in case we need to
916-
* bring down the GX after a GMU failure
917-
*/
918-
if (!IS_ERR_OR_NULL(gmu->gxpd))
919-
pm_runtime_get(gmu->gxpd);
920-
921922
out:
922923
/* On failure, shut down the GMU to leave it in a good state */
923924
if (ret) {
924925
disable_irq(gmu->gmu_irq);
925926
a6xx_rpmh_stop(gmu);
927+
pm_runtime_put(gmu->gxpd);
926928
pm_runtime_put(gmu->dev);
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}
928930

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