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| 1 | +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | +%YAML 1.2 |
| 3 | +--- |
| 4 | +$id: http://devicetree.org/schemas/dma/cirrus,ep9301-dma-m2p.yaml# |
| 5 | +$schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | + |
| 7 | +title: Cirrus Logic ep93xx SoC M2P DMA controller |
| 8 | + |
| 9 | +maintainers: |
| 10 | + - Alexander Sverdlin <[email protected]> |
| 11 | + - Nikita Shubin <[email protected]> |
| 12 | + |
| 13 | +allOf: |
| 14 | + - $ref: dma-controller.yaml# |
| 15 | + |
| 16 | +properties: |
| 17 | + compatible: |
| 18 | + oneOf: |
| 19 | + - const: cirrus,ep9301-dma-m2p |
| 20 | + - items: |
| 21 | + - enum: |
| 22 | + - cirrus,ep9302-dma-m2p |
| 23 | + - cirrus,ep9307-dma-m2p |
| 24 | + - cirrus,ep9312-dma-m2p |
| 25 | + - cirrus,ep9315-dma-m2p |
| 26 | + - const: cirrus,ep9301-dma-m2p |
| 27 | + |
| 28 | + reg: |
| 29 | + items: |
| 30 | + - description: m2p0 channel registers |
| 31 | + - description: m2p1 channel registers |
| 32 | + - description: m2p2 channel registers |
| 33 | + - description: m2p3 channel registers |
| 34 | + - description: m2p4 channel registers |
| 35 | + - description: m2p5 channel registers |
| 36 | + - description: m2p6 channel registers |
| 37 | + - description: m2p7 channel registers |
| 38 | + - description: m2p8 channel registers |
| 39 | + - description: m2p9 channel registers |
| 40 | + |
| 41 | + clocks: |
| 42 | + items: |
| 43 | + - description: m2p0 channel gate clock |
| 44 | + - description: m2p1 channel gate clock |
| 45 | + - description: m2p2 channel gate clock |
| 46 | + - description: m2p3 channel gate clock |
| 47 | + - description: m2p4 channel gate clock |
| 48 | + - description: m2p5 channel gate clock |
| 49 | + - description: m2p6 channel gate clock |
| 50 | + - description: m2p7 channel gate clock |
| 51 | + - description: m2p8 channel gate clock |
| 52 | + - description: m2p9 channel gate clock |
| 53 | + |
| 54 | + clock-names: |
| 55 | + items: |
| 56 | + - const: m2p0 |
| 57 | + - const: m2p1 |
| 58 | + - const: m2p2 |
| 59 | + - const: m2p3 |
| 60 | + - const: m2p4 |
| 61 | + - const: m2p5 |
| 62 | + - const: m2p6 |
| 63 | + - const: m2p7 |
| 64 | + - const: m2p8 |
| 65 | + - const: m2p9 |
| 66 | + |
| 67 | + interrupts: |
| 68 | + items: |
| 69 | + - description: m2p0 channel interrupt |
| 70 | + - description: m2p1 channel interrupt |
| 71 | + - description: m2p2 channel interrupt |
| 72 | + - description: m2p3 channel interrupt |
| 73 | + - description: m2p4 channel interrupt |
| 74 | + - description: m2p5 channel interrupt |
| 75 | + - description: m2p6 channel interrupt |
| 76 | + - description: m2p7 channel interrupt |
| 77 | + - description: m2p8 channel interrupt |
| 78 | + - description: m2p9 channel interrupt |
| 79 | + |
| 80 | + '#dma-cells': |
| 81 | + const: 2 |
| 82 | + description: | |
| 83 | + The first cell is the unique device channel number as indicated by this |
| 84 | + table for ep93xx: |
| 85 | +
|
| 86 | + 0: I2S channel 1 |
| 87 | + 1: I2S channel 2 (unused) |
| 88 | + 2: AC97 channel 1 (unused) |
| 89 | + 3: AC97 channel 2 (unused) |
| 90 | + 4: AC97 channel 3 (unused) |
| 91 | + 5: I2S channel 3 (unused) |
| 92 | + 6: UART1 (unused) |
| 93 | + 7: UART2 (unused) |
| 94 | + 8: UART3 (unused) |
| 95 | + 9: IRDA (unused) |
| 96 | +
|
| 97 | + The second cell is the DMA direction line number: |
| 98 | +
|
| 99 | + 1: Memory to device |
| 100 | + 2: Device to memory |
| 101 | +
|
| 102 | +required: |
| 103 | + - compatible |
| 104 | + - reg |
| 105 | + - clocks |
| 106 | + - clock-names |
| 107 | + - interrupts |
| 108 | + |
| 109 | +additionalProperties: false |
| 110 | + |
| 111 | +examples: |
| 112 | + - | |
| 113 | + #include <dt-bindings/clock/cirrus,ep9301-syscon.h> |
| 114 | + dma-controller@80000000 { |
| 115 | + compatible = "cirrus,ep9301-dma-m2p"; |
| 116 | + reg = <0x80000000 0x0040>, |
| 117 | + <0x80000040 0x0040>, |
| 118 | + <0x80000080 0x0040>, |
| 119 | + <0x800000c0 0x0040>, |
| 120 | + <0x80000240 0x0040>, |
| 121 | + <0x80000200 0x0040>, |
| 122 | + <0x800002c0 0x0040>, |
| 123 | + <0x80000280 0x0040>, |
| 124 | + <0x80000340 0x0040>, |
| 125 | + <0x80000300 0x0040>; |
| 126 | + clocks = <&syscon EP93XX_CLK_M2P0>, |
| 127 | + <&syscon EP93XX_CLK_M2P1>, |
| 128 | + <&syscon EP93XX_CLK_M2P2>, |
| 129 | + <&syscon EP93XX_CLK_M2P3>, |
| 130 | + <&syscon EP93XX_CLK_M2P4>, |
| 131 | + <&syscon EP93XX_CLK_M2P5>, |
| 132 | + <&syscon EP93XX_CLK_M2P6>, |
| 133 | + <&syscon EP93XX_CLK_M2P7>, |
| 134 | + <&syscon EP93XX_CLK_M2P8>, |
| 135 | + <&syscon EP93XX_CLK_M2P9>; |
| 136 | + clock-names = "m2p0", "m2p1", |
| 137 | + "m2p2", "m2p3", |
| 138 | + "m2p4", "m2p5", |
| 139 | + "m2p6", "m2p7", |
| 140 | + "m2p8", "m2p9"; |
| 141 | + interrupt-parent = <&vic0>; |
| 142 | + interrupts = <7>, <8>, <9>, <10>, <11>, <12>, <13>, <14>, <15>, <16>; |
| 143 | + #dma-cells = <2>; |
| 144 | + }; |
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