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drm/i915/dp: Initialize the source OUI write timestamp always
If the source OUI DPCD register value matches the expected Intel OUI value, the write timestamp doesn't get updated leaving it at the 0 initial value if the OUI wasn't written before. This can lead to an incorrect wait duration in intel_dp_wait_source_oui(), since jiffies is not inited to 0 in general (on a 32 bit system INITIAL_JIFFIES is set to 5 minutes ahead of wrap-around). Fix this by intializing the write timestamp in the above case as well. Reviewed-by: Ville Syrjälä <[email protected]> Signed-off-by: Imre Deak <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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drivers/gpu/drm/i915/display/intel_dp.c

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3418,8 +3418,11 @@ intel_edp_init_source_oui(struct intel_dp *intel_dp, bool careful)
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if (drm_dp_dpcd_read(&intel_dp->aux, DP_SOURCE_OUI, buf, sizeof(buf)) < 0)
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drm_err(&i915->drm, "Failed to read source OUI\n");
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3421-
if (memcmp(oui, buf, sizeof(oui)) == 0)
3421+
if (memcmp(oui, buf, sizeof(oui)) == 0) {
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/* Assume the OUI was written now. */
3423+
intel_dp->last_oui_write = jiffies;
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return;
3425+
}
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}
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if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui, sizeof(oui)) < 0)

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