Skip to content

Commit 5897c17

Browse files
bjorn-helgaasbjorn-helgaas
committed
Merge branch 'pci/field-get'
- Use FIELD_GET()/FIELD_PREP() when possible throughout drivers/pci/ (Ilpo Järvinen, Bjorn Helgaas) - Rework DPC control programming for clarity (Ilpo Järvinen) * pci/field-get: PCI/portdrv: Use FIELD_GET() PCI/VC: Use FIELD_GET() PCI/PTM: Use FIELD_GET() PCI/PME: Use FIELD_GET() PCI/ATS: Use FIELD_GET() PCI/ATS: Show PASID Capability register width in bitmasks PCI: Use FIELD_GET() in Sapphire RX 5600 XT Pulse quirk PCI: Use FIELD_GET() PCI/MSI: Use FIELD_GET/PREP() PCI/DPC: Use defines with DPC reason fields PCI/DPC: Use defined fields with DPC_CTL register PCI/DPC: Use FIELD_GET() PCI: hotplug: Use FIELD_GET/PREP() PCI: dwc: Use FIELD_GET/PREP() PCI: cadence: Use FIELD_GET() PCI: Use FIELD_GET() to extract Link Width PCI: mvebu: Use FIELD_PREP() with Link Width PCI: tegra194: Use FIELD_GET()/FIELD_PREP() with Link Width fields # Conflicts: # drivers/pci/controller/dwc/pcie-tegra194.c
2 parents 65de3fd + 8a03955 commit 5897c17

File tree

19 files changed

+128
-96
lines changed

19 files changed

+128
-96
lines changed

‎drivers/pci/ats.c

Lines changed: 2 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@
99
* Copyright (C) 2011 Advanced Micro Devices,
1010
*/
1111

12+
#include <linux/bitfield.h>
1213
#include <linux/export.h>
1314
#include <linux/pci-ats.h>
1415
#include <linux/pci.h>
@@ -480,8 +481,6 @@ int pci_pasid_features(struct pci_dev *pdev)
480481
}
481482
EXPORT_SYMBOL_GPL(pci_pasid_features);
482483

483-
#define PASID_NUMBER_SHIFT 8
484-
#define PASID_NUMBER_MASK (0x1f << PASID_NUMBER_SHIFT)
485484
/**
486485
* pci_max_pasids - Get maximum number of PASIDs supported by device
487486
* @pdev: PCI device structure
@@ -503,9 +502,7 @@ int pci_max_pasids(struct pci_dev *pdev)
503502

504503
pci_read_config_word(pdev, pasid + PCI_PASID_CAP, &supported);
505504

506-
supported = (supported & PASID_NUMBER_MASK) >> PASID_NUMBER_SHIFT;
507-
508-
return (1 << supported);
505+
return (1 << FIELD_GET(PCI_PASID_CAP_WIDTH, supported));
509506
}
510507
EXPORT_SYMBOL_GPL(pci_max_pasids);
511508
#endif /* CONFIG_PCI_PASID */

‎drivers/pci/controller/cadence/pcie-cadence-ep.c

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,7 @@
33
// Cadence PCIe endpoint controller driver.
44
// Author: Cyrille Pitchen <[email protected]>
55

6+
#include <linux/bitfield.h>
67
#include <linux/delay.h>
78
#include <linux/kernel.h>
89
#include <linux/of.h>
@@ -262,7 +263,7 @@ static int cdns_pcie_ep_get_msi(struct pci_epc *epc, u8 fn, u8 vfn)
262263
* Get the Multiple Message Enable bitfield from the Message Control
263264
* register.
264265
*/
265-
mme = (flags & PCI_MSI_FLAGS_QSIZE) >> 4;
266+
mme = FIELD_GET(PCI_MSI_FLAGS_QSIZE, flags);
266267

267268
return mme;
268269
}
@@ -394,7 +395,7 @@ static int cdns_pcie_ep_send_msi_irq(struct cdns_pcie_ep *ep, u8 fn, u8 vfn,
394395
return -EINVAL;
395396

396397
/* Get the number of enabled MSIs */
397-
mme = (flags & PCI_MSI_FLAGS_QSIZE) >> 4;
398+
mme = FIELD_GET(PCI_MSI_FLAGS_QSIZE, flags);
398399
msi_count = 1 << mme;
399400
if (!interrupt_num || interrupt_num > msi_count)
400401
return -EINVAL;
@@ -449,7 +450,7 @@ static int cdns_pcie_ep_map_msi_irq(struct pci_epc *epc, u8 fn, u8 vfn,
449450
return -EINVAL;
450451

451452
/* Get the number of enabled MSIs */
452-
mme = (flags & PCI_MSI_FLAGS_QSIZE) >> 4;
453+
mme = FIELD_GET(PCI_MSI_FLAGS_QSIZE, flags);
453454
msi_count = 1 << mme;
454455
if (!interrupt_num || interrupt_num > msi_count)
455456
return -EINVAL;
@@ -506,7 +507,7 @@ static int cdns_pcie_ep_send_msix_irq(struct cdns_pcie_ep *ep, u8 fn, u8 vfn,
506507

507508
reg = cap + PCI_MSIX_TABLE;
508509
tbl_offset = cdns_pcie_ep_fn_readl(pcie, fn, reg);
509-
bir = tbl_offset & PCI_MSIX_TABLE_BIR;
510+
bir = FIELD_GET(PCI_MSIX_TABLE_BIR, tbl_offset);
510511
tbl_offset &= PCI_MSIX_TABLE_OFFSET;
511512

512513
msix_tbl = epf->epf_bar[bir]->addr + tbl_offset;

‎drivers/pci/controller/dwc/pcie-designware-ep.c

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66
* Author: Kishon Vijay Abraham I <[email protected]>
77
*/
88

9+
#include <linux/bitfield.h>
910
#include <linux/of.h>
1011
#include <linux/platform_device.h>
1112

@@ -350,7 +351,7 @@ static int dw_pcie_ep_get_msi(struct pci_epc *epc, u8 func_no, u8 vfunc_no)
350351
if (!(val & PCI_MSI_FLAGS_ENABLE))
351352
return -EINVAL;
352353

353-
val = (val & PCI_MSI_FLAGS_QSIZE) >> 4;
354+
val = FIELD_GET(PCI_MSI_FLAGS_QSIZE, val);
354355

355356
return val;
356357
}
@@ -373,7 +374,7 @@ static int dw_pcie_ep_set_msi(struct pci_epc *epc, u8 func_no, u8 vfunc_no,
373374
reg = ep_func->msi_cap + func_offset + PCI_MSI_FLAGS;
374375
val = dw_pcie_readw_dbi(pci, reg);
375376
val &= ~PCI_MSI_FLAGS_QMASK;
376-
val |= (interrupts << 1) & PCI_MSI_FLAGS_QMASK;
377+
val |= FIELD_PREP(PCI_MSI_FLAGS_QMASK, interrupts);
377378
dw_pcie_dbi_ro_wr_en(pci);
378379
dw_pcie_writew_dbi(pci, reg, val);
379380
dw_pcie_dbi_ro_wr_dis(pci);
@@ -600,7 +601,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no,
600601

601602
reg = ep_func->msix_cap + func_offset + PCI_MSIX_TABLE;
602603
tbl_offset = dw_pcie_readl_dbi(pci, reg);
603-
bir = (tbl_offset & PCI_MSIX_TABLE_BIR);
604+
bir = FIELD_GET(PCI_MSIX_TABLE_BIR, tbl_offset);
604605
tbl_offset &= PCI_MSIX_TABLE_OFFSET;
605606

606607
msix_tbl = ep->epf_bar[bir]->addr + tbl_offset;

‎drivers/pci/controller/dwc/pcie-tegra194.c

Lines changed: 10 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@
99
* Author: Vidya Sagar <[email protected]>
1010
*/
1111

12+
#include <linux/bitfield.h>
1213
#include <linux/clk.h>
1314
#include <linux/debugfs.h>
1415
#include <linux/delay.h>
@@ -125,7 +126,7 @@
125126

126127
#define APPL_LTR_MSG_1 0xC4
127128
#define LTR_MSG_REQ BIT(15)
128-
#define LTR_MST_NO_SNOOP_SHIFT 16
129+
#define LTR_NOSNOOP_MSG_REQ BIT(31)
129130

130131
#define APPL_LTR_MSG_2 0xC8
131132
#define APPL_LTR_MSG_2_LTR_MSG_REQ_STATE BIT(3)
@@ -346,8 +347,7 @@ static void apply_bad_link_workaround(struct dw_pcie_rp *pp)
346347
*/
347348
val = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base + PCI_EXP_LNKSTA);
348349
if (val & PCI_EXP_LNKSTA_LBMS) {
349-
current_link_width = (val & PCI_EXP_LNKSTA_NLW) >>
350-
PCI_EXP_LNKSTA_NLW_SHIFT;
350+
current_link_width = FIELD_GET(PCI_EXP_LNKSTA_NLW, val);
351351
if (pcie->init_link_width > current_link_width) {
352352
dev_warn(pci->dev, "PCIe link is bad, width reduced\n");
353353
val = dw_pcie_readw_dbi(pci, pcie->pcie_cap_base +
@@ -496,8 +496,12 @@ static irqreturn_t tegra_pcie_ep_irq_thread(int irq, void *arg)
496496
ktime_t timeout;
497497

498498
/* 110us for both snoop and no-snoop */
499-
val = 110 | (2 << PCI_LTR_SCALE_SHIFT) | LTR_MSG_REQ;
500-
val |= (val << LTR_MST_NO_SNOOP_SHIFT);
499+
val = FIELD_PREP(PCI_LTR_VALUE_MASK, 110) |
500+
FIELD_PREP(PCI_LTR_SCALE_MASK, 2) |
501+
LTR_MSG_REQ |
502+
FIELD_PREP(PCI_LTR_NOSNOOP_VALUE, 110) |
503+
FIELD_PREP(PCI_LTR_NOSNOOP_SCALE, 2) |
504+
LTR_NOSNOOP_MSG_REQ;
501505
appl_writel(pcie, val, APPL_LTR_MSG_1);
502506

503507
/* Send LTR upstream */
@@ -760,8 +764,7 @@ static void tegra_pcie_enable_system_interrupts(struct dw_pcie_rp *pp)
760764

761765
val_w = dw_pcie_readw_dbi(&pcie->pci, pcie->pcie_cap_base +
762766
PCI_EXP_LNKSTA);
763-
pcie->init_link_width = (val_w & PCI_EXP_LNKSTA_NLW) >>
764-
PCI_EXP_LNKSTA_NLW_SHIFT;
767+
pcie->init_link_width = FIELD_GET(PCI_EXP_LNKSTA_NLW, val_w);
765768

766769
val_w = dw_pcie_readw_dbi(&pcie->pci, pcie->pcie_cap_base +
767770
PCI_EXP_LNKCTL);

‎drivers/pci/controller/pci-mvebu.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -264,7 +264,7 @@ static void mvebu_pcie_setup_hw(struct mvebu_pcie_port *port)
264264
*/
265265
lnkcap = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP);
266266
lnkcap &= ~PCI_EXP_LNKCAP_MLW;
267-
lnkcap |= (port->is_x4 ? 4 : 1) << 4;
267+
lnkcap |= FIELD_PREP(PCI_EXP_LNKCAP_MLW, port->is_x4 ? 4 : 1);
268268
mvebu_writel(port, lnkcap, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP);
269269

270270
/* Disable Root Bridge I/O space, memory space and bus mastering. */

‎drivers/pci/hotplug/pciehp_core.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,6 +20,7 @@
2020
#define pr_fmt(fmt) "pciehp: " fmt
2121
#define dev_fmt pr_fmt
2222

23+
#include <linux/bitfield.h>
2324
#include <linux/moduleparam.h>
2425
#include <linux/kernel.h>
2526
#include <linux/slab.h>
@@ -103,7 +104,7 @@ static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 status)
103104
struct pci_dev *pdev = ctrl->pcie->port;
104105

105106
if (status)
106-
status <<= PCI_EXP_SLTCTL_ATTN_IND_SHIFT;
107+
status = FIELD_PREP(PCI_EXP_SLTCTL_AIC, status);
107108
else
108109
status = PCI_EXP_SLTCTL_ATTN_IND_OFF;
109110

‎drivers/pci/hotplug/pciehp_hpc.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@
1414

1515
#define dev_fmt(fmt) "pciehp: " fmt
1616

17+
#include <linux/bitfield.h>
1718
#include <linux/dmi.h>
1819
#include <linux/kernel.h>
1920
#include <linux/types.h>
@@ -484,7 +485,7 @@ int pciehp_set_raw_indicator_status(struct hotplug_slot *hotplug_slot,
484485
struct pci_dev *pdev = ctrl_dev(ctrl);
485486

486487
pci_config_pm_runtime_get(pdev);
487-
pcie_write_cmd_nowait(ctrl, status << 6,
488+
pcie_write_cmd_nowait(ctrl, FIELD_PREP(PCI_EXP_SLTCTL_AIC, status),
488489
PCI_EXP_SLTCTL_AIC | PCI_EXP_SLTCTL_PIC);
489490
pci_config_pm_runtime_put(pdev);
490491
return 0;
@@ -1028,7 +1029,7 @@ struct controller *pcie_init(struct pcie_device *dev)
10281029
PCI_EXP_SLTSTA_DLLSC | PCI_EXP_SLTSTA_PDC);
10291030

10301031
ctrl_info(ctrl, "Slot #%d AttnBtn%c PwrCtrl%c MRL%c AttnInd%c PwrInd%c HotPlug%c Surprise%c Interlock%c NoCompl%c IbPresDis%c LLActRep%c%s\n",
1031-
(slot_cap & PCI_EXP_SLTCAP_PSN) >> 19,
1032+
FIELD_GET(PCI_EXP_SLTCAP_PSN, slot_cap),
10321033
FLAG(slot_cap, PCI_EXP_SLTCAP_ABP),
10331034
FLAG(slot_cap, PCI_EXP_SLTCAP_PCP),
10341035
FLAG(slot_cap, PCI_EXP_SLTCAP_MRLSP),

‎drivers/pci/hotplug/pnv_php.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,7 @@
55
* Copyright Gavin Shan, IBM Corporation 2016.
66
*/
77

8+
#include <linux/bitfield.h>
89
#include <linux/libfdt.h>
910
#include <linux/module.h>
1011
#include <linux/pci.h>
@@ -731,7 +732,7 @@ static int pnv_php_enable_msix(struct pnv_php_slot *php_slot)
731732

732733
/* Check hotplug MSIx entry is in range */
733734
pcie_capability_read_word(pdev, PCI_EXP_FLAGS, &pcie_flag);
734-
entry.entry = (pcie_flag & PCI_EXP_FLAGS_IRQ) >> 9;
735+
entry.entry = FIELD_GET(PCI_EXP_FLAGS_IRQ, pcie_flag);
735736
if (entry.entry >= nr_entries)
736737
return -ERANGE;
737738

‎drivers/pci/msi/msi.c

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -6,6 +6,7 @@
66
* Copyright (C) Tom Long Nguyen ([email protected])
77
* Copyright (C) 2016 Christoph Hellwig.
88
*/
9+
#include <linux/bitfield.h>
910
#include <linux/err.h>
1011
#include <linux/export.h>
1112
#include <linux/irq.h>
@@ -188,7 +189,7 @@ static inline void pci_write_msg_msi(struct pci_dev *dev, struct msi_desc *desc,
188189

189190
pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &msgctl);
190191
msgctl &= ~PCI_MSI_FLAGS_QSIZE;
191-
msgctl |= desc->pci.msi_attrib.multiple << 4;
192+
msgctl |= FIELD_PREP(PCI_MSI_FLAGS_QSIZE, desc->pci.msi_attrib.multiple);
192193
pci_write_config_word(dev, pos + PCI_MSI_FLAGS, msgctl);
193194

194195
pci_write_config_dword(dev, pos + PCI_MSI_ADDRESS_LO, msg->address_lo);
@@ -299,7 +300,7 @@ static int msi_setup_msi_desc(struct pci_dev *dev, int nvec,
299300
desc.pci.msi_attrib.is_64 = !!(control & PCI_MSI_FLAGS_64BIT);
300301
desc.pci.msi_attrib.can_mask = !!(control & PCI_MSI_FLAGS_MASKBIT);
301302
desc.pci.msi_attrib.default_irq = dev->irq;
302-
desc.pci.msi_attrib.multi_cap = (control & PCI_MSI_FLAGS_QMASK) >> 1;
303+
desc.pci.msi_attrib.multi_cap = FIELD_GET(PCI_MSI_FLAGS_QMASK, control);
303304
desc.pci.msi_attrib.multiple = ilog2(__roundup_pow_of_two(nvec));
304305
desc.affinity = masks;
305306

@@ -478,7 +479,7 @@ int pci_msi_vec_count(struct pci_dev *dev)
478479
return -EINVAL;
479480

480481
pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &msgctl);
481-
ret = 1 << ((msgctl & PCI_MSI_FLAGS_QMASK) >> 1);
482+
ret = 1 << FIELD_GET(PCI_MSI_FLAGS_QMASK, msgctl);
482483

483484
return ret;
484485
}
@@ -511,7 +512,8 @@ void __pci_restore_msi_state(struct pci_dev *dev)
511512
pci_read_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, &control);
512513
pci_msi_update_mask(entry, 0, 0);
513514
control &= ~PCI_MSI_FLAGS_QSIZE;
514-
control |= (entry->pci.msi_attrib.multiple << 4) | PCI_MSI_FLAGS_ENABLE;
515+
control |= PCI_MSI_FLAGS_ENABLE |
516+
FIELD_PREP(PCI_MSI_FLAGS_QSIZE, entry->pci.msi_attrib.multiple);
515517
pci_write_config_word(dev, dev->msi_cap + PCI_MSI_FLAGS, control);
516518
}
517519

‎drivers/pci/pci-sysfs.c

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@
1212
* Modeled after usb's driverfs.c
1313
*/
1414

15-
15+
#include <linux/bitfield.h>
1616
#include <linux/kernel.h>
1717
#include <linux/sched.h>
1818
#include <linux/pci.h>
@@ -230,8 +230,7 @@ static ssize_t current_link_width_show(struct device *dev,
230230
if (err)
231231
return -EINVAL;
232232

233-
return sysfs_emit(buf, "%u\n",
234-
(linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
233+
return sysfs_emit(buf, "%u\n", FIELD_GET(PCI_EXP_LNKSTA_NLW, linkstat));
235234
}
236235
static DEVICE_ATTR_RO(current_link_width);
237236

0 commit comments

Comments
 (0)