@@ -65,6 +65,7 @@ struct qcom_iommu_domain {
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struct mutex init_mutex ; /* Protects iommu pointer */
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struct iommu_domain domain ;
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struct qcom_iommu_dev * iommu ;
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+ struct iommu_fwspec * fwspec ;
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};
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static struct qcom_iommu_domain * to_qcom_iommu_domain (struct iommu_domain * dom )
@@ -84,9 +85,9 @@ static struct qcom_iommu_dev * to_iommu(struct device *dev)
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return dev_iommu_priv_get (dev );
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}
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- static struct qcom_iommu_ctx * to_ctx (struct device * dev , unsigned asid )
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+ static struct qcom_iommu_ctx * to_ctx (struct qcom_iommu_domain * d , unsigned asid )
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{
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- struct qcom_iommu_dev * qcom_iommu = to_iommu ( dev ) ;
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+ struct qcom_iommu_dev * qcom_iommu = d -> iommu ;
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if (!qcom_iommu )
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return NULL ;
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return qcom_iommu -> ctxs [asid - 1 ];
@@ -118,14 +119,12 @@ iommu_readq(struct qcom_iommu_ctx *ctx, unsigned reg)
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static void qcom_iommu_tlb_sync (void * cookie )
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{
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- struct iommu_fwspec * fwspec ;
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- struct device * dev = cookie ;
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+ struct qcom_iommu_domain * qcom_domain = cookie ;
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+ struct iommu_fwspec * fwspec = qcom_domain -> fwspec ;
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unsigned i ;
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- fwspec = dev_iommu_fwspec_get (dev );
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-
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for (i = 0 ; i < fwspec -> num_ids ; i ++ ) {
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- struct qcom_iommu_ctx * ctx = to_ctx (dev , fwspec -> ids [i ]);
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+ struct qcom_iommu_ctx * ctx = to_ctx (qcom_domain , fwspec -> ids [i ]);
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unsigned int val , ret ;
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iommu_writel (ctx , ARM_SMMU_CB_TLBSYNC , 0 );
@@ -139,14 +138,12 @@ static void qcom_iommu_tlb_sync(void *cookie)
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static void qcom_iommu_tlb_inv_context (void * cookie )
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{
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- struct device * dev = cookie ;
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- struct iommu_fwspec * fwspec ;
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+ struct qcom_iommu_domain * qcom_domain = cookie ;
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+ struct iommu_fwspec * fwspec = qcom_domain -> fwspec ;
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unsigned i ;
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- fwspec = dev_iommu_fwspec_get (dev );
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-
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for (i = 0 ; i < fwspec -> num_ids ; i ++ ) {
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- struct qcom_iommu_ctx * ctx = to_ctx (dev , fwspec -> ids [i ]);
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+ struct qcom_iommu_ctx * ctx = to_ctx (qcom_domain , fwspec -> ids [i ]);
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iommu_writel (ctx , ARM_SMMU_CB_S1_TLBIASID , ctx -> asid );
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}
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@@ -156,16 +153,14 @@ static void qcom_iommu_tlb_inv_context(void *cookie)
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static void qcom_iommu_tlb_inv_range_nosync (unsigned long iova , size_t size ,
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size_t granule , bool leaf , void * cookie )
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{
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- struct device * dev = cookie ;
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- struct iommu_fwspec * fwspec ;
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+ struct qcom_iommu_domain * qcom_domain = cookie ;
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+ struct iommu_fwspec * fwspec = qcom_domain -> fwspec ;
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unsigned i , reg ;
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reg = leaf ? ARM_SMMU_CB_S1_TLBIVAL : ARM_SMMU_CB_S1_TLBIVA ;
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- fwspec = dev_iommu_fwspec_get (dev );
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-
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for (i = 0 ; i < fwspec -> num_ids ; i ++ ) {
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- struct qcom_iommu_ctx * ctx = to_ctx (dev , fwspec -> ids [i ]);
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+ struct qcom_iommu_ctx * ctx = to_ctx (qcom_domain , fwspec -> ids [i ]);
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size_t s = size ;
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iova = (iova >> 12 ) << 12 ;
@@ -256,7 +251,9 @@ static int qcom_iommu_init_domain(struct iommu_domain *domain,
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};
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qcom_domain -> iommu = qcom_iommu ;
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- pgtbl_ops = alloc_io_pgtable_ops (ARM_32_LPAE_S1 , & pgtbl_cfg , dev );
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+ qcom_domain -> fwspec = fwspec ;
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+
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+ pgtbl_ops = alloc_io_pgtable_ops (ARM_32_LPAE_S1 , & pgtbl_cfg , qcom_domain );
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if (!pgtbl_ops ) {
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dev_err (qcom_iommu -> dev , "failed to allocate pagetable ops\n" );
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ret = - ENOMEM ;
@@ -269,7 +266,7 @@ static int qcom_iommu_init_domain(struct iommu_domain *domain,
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domain -> geometry .force_aperture = true;
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for (i = 0 ; i < fwspec -> num_ids ; i ++ ) {
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- struct qcom_iommu_ctx * ctx = to_ctx (dev , fwspec -> ids [i ]);
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+ struct qcom_iommu_ctx * ctx = to_ctx (qcom_domain , fwspec -> ids [i ]);
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if (!ctx -> secure_init ) {
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ret = qcom_scm_restore_sec_cfg (qcom_iommu -> sec_id , ctx -> asid );
@@ -419,7 +416,7 @@ static void qcom_iommu_detach_dev(struct iommu_domain *domain, struct device *de
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pm_runtime_get_sync (qcom_iommu -> dev );
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for (i = 0 ; i < fwspec -> num_ids ; i ++ ) {
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- struct qcom_iommu_ctx * ctx = to_ctx (dev , fwspec -> ids [i ]);
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+ struct qcom_iommu_ctx * ctx = to_ctx (qcom_domain , fwspec -> ids [i ]);
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/* Disable the context bank: */
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iommu_writel (ctx , ARM_SMMU_CB_SCTLR , 0 );
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