@@ -934,11 +934,11 @@ static bool pxa2xx_spi_can_dma(struct spi_controller *controller,
934934 struct spi_device * spi ,
935935 struct spi_transfer * xfer )
936936{
937- struct chip_data * chip = spi_get_ctldata ( spi );
937+ struct driver_data * drv_data = spi_controller_get_devdata ( controller );
938938
939- return chip -> enable_dma &&
939+ return drv_data -> controller_info -> enable_dma &&
940940 xfer -> len <= MAX_DMA_LEN &&
941- xfer -> len >= chip -> dma_burst_size ;
941+ xfer -> len >= drv_data -> controller_info -> dma_burst_size ;
942942}
943943
944944static int pxa2xx_spi_transfer_one (struct spi_controller * controller ,
@@ -947,9 +947,8 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *controller,
947947{
948948 struct driver_data * drv_data = spi_controller_get_devdata (controller );
949949 struct chip_data * chip = spi_get_ctldata (spi );
950- u32 dma_thresh = chip -> dma_threshold ;
951- u32 dma_burst = chip -> dma_burst_size ;
952950 u32 change_mask = pxa2xx_spi_get_ssrc1_change_mask (drv_data );
951+ u32 dma_thresh ;
953952 u32 clk_div ;
954953 u8 bits ;
955954 u32 speed ;
@@ -959,7 +958,7 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *controller,
959958 int dma_mapped ;
960959
961960 /* Check if we can DMA this transfer */
962- if (transfer -> len > MAX_DMA_LEN && chip -> enable_dma ) {
961+ if (transfer -> len > MAX_DMA_LEN && drv_data -> controller_info -> enable_dma ) {
963962 /* Warn ... we force this to PIO mode */
964963 dev_warn_ratelimited (& spi -> dev ,
965964 "DMA disabled for transfer length %u greater than %d\n" ,
@@ -995,19 +994,8 @@ static int pxa2xx_spi_transfer_one(struct spi_controller *controller,
995994 drv_data -> read = drv_data -> rx ? u32_reader : null_reader ;
996995 drv_data -> write = drv_data -> tx ? u32_writer : null_writer ;
997996 }
998- /*
999- * If bits per word is changed in DMA mode, then must check
1000- * the thresholds and burst also.
1001- */
1002- if (chip -> enable_dma ) {
1003- if (pxa2xx_spi_set_dma_burst_and_threshold (chip ,
1004- spi ,
1005- bits , & dma_burst ,
1006- & dma_thresh ))
1007- dev_warn_ratelimited (& spi -> dev ,
1008- "DMA burst size reduced to match bits_per_word\n" );
1009- }
1010997
998+ dma_thresh = SSCR1_RxTresh (RX_THRESH_DFLT ) | SSCR1_TxTresh (TX_THRESH_DFLT );
1011999 dma_mapped = controller -> can_dma &&
10121000 controller -> can_dma (controller , spi , transfer ) &&
10131001 controller -> cur_msg_mapped ;
@@ -1213,7 +1201,6 @@ static int setup(struct spi_device *spi)
12131201 if (!chip )
12141202 return - ENOMEM ;
12151203
1216- chip -> enable_dma = drv_data -> controller_info -> enable_dma ;
12171204 chip -> timeout = TIMOUT_DFLT ;
12181205 }
12191206
@@ -1236,20 +1223,6 @@ static int setup(struct spi_device *spi)
12361223 chip -> lpss_tx_threshold = tx_thres ;
12371224 }
12381225
1239- if (chip -> enable_dma ) {
1240- /* Set up legal burst and threshold for DMA */
1241- if (pxa2xx_spi_set_dma_burst_and_threshold (chip , spi ,
1242- spi -> bits_per_word ,
1243- & chip -> dma_burst_size ,
1244- & chip -> dma_threshold )) {
1245- dev_warn (& spi -> dev ,
1246- "in setup: DMA burst size reduced to match bits_per_word\n" );
1247- }
1248- dev_dbg (& spi -> dev ,
1249- "in setup: DMA burst size set to %u\n" ,
1250- chip -> dma_burst_size );
1251- }
1252-
12531226 switch (drv_data -> ssp_type ) {
12541227 case QUARK_X1000_SSP :
12551228 chip -> threshold = (QUARK_X1000_SSCR1_RxTresh (rx_thres )
@@ -1439,6 +1412,7 @@ static int pxa2xx_spi_probe(struct platform_device *pdev)
14391412 if (IS_ERR (platform_info ))
14401413 return dev_err_probe (dev , PTR_ERR (platform_info ), "missing platform data\n" );
14411414 }
1415+ dev_dbg (dev , "DMA burst size set to %u\n" , platform_info -> dma_burst_size );
14421416
14431417 ssp = pxa_ssp_request (pdev -> id , pdev -> name );
14441418 if (!ssp )
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