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111 | 111 | #include <linux/err.h>
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112 | 112 | #include <linux/platform_device.h>
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113 | 113 | #include <linux/platform_data/itco_wdt.h>
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| 114 | +#include <linux/platform_data/x86/p2sb.h> |
114 | 115 | #include <linux/pm_runtime.h>
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115 | 116 | #include <linux/mutex.h>
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116 | 117 |
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140 | 141 | #define TCOBASE 0x050
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141 | 142 | #define TCOCTL 0x054
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142 | 143 |
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143 |
| -#define SBREG_BAR 0x10 |
144 | 144 | #define SBREG_SMBCTRL 0xc6000c
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145 | 145 | #define SBREG_SMBCTRL_DNV 0xcf000c
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146 | 146 |
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@@ -1482,45 +1482,24 @@ i801_add_tco_spt(struct i801_priv *priv, struct pci_dev *pci_dev,
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1482 | 1482 | .version = 4,
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1483 | 1483 | };
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1484 | 1484 | struct resource *res;
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1485 |
| - unsigned int devfn; |
1486 |
| - u64 base64_addr; |
1487 |
| - u32 base_addr; |
1488 |
| - u8 hidden; |
| 1485 | + int ret; |
1489 | 1486 |
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1490 | 1487 | /*
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1491 | 1488 | * We must access the NO_REBOOT bit over the Primary to Sideband
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1492 |
| - * bridge (P2SB). The BIOS prevents the P2SB device from being |
1493 |
| - * enumerated by the PCI subsystem, so we need to unhide/hide it |
1494 |
| - * to lookup the P2SB BAR. |
| 1489 | + * (P2SB) bridge. |
1495 | 1490 | */
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1496 |
| - pci_lock_rescan_remove(); |
1497 |
| - |
1498 |
| - devfn = PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 1); |
1499 |
| - |
1500 |
| - /* Unhide the P2SB device, if it is hidden */ |
1501 |
| - pci_bus_read_config_byte(pci_dev->bus, devfn, 0xe1, &hidden); |
1502 |
| - if (hidden) |
1503 |
| - pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, 0x0); |
1504 |
| - |
1505 |
| - pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR, &base_addr); |
1506 |
| - base64_addr = base_addr & 0xfffffff0; |
1507 |
| - |
1508 |
| - pci_bus_read_config_dword(pci_dev->bus, devfn, SBREG_BAR + 0x4, &base_addr); |
1509 |
| - base64_addr |= (u64)base_addr << 32; |
1510 |
| - |
1511 |
| - /* Hide the P2SB device, if it was hidden before */ |
1512 |
| - if (hidden) |
1513 |
| - pci_bus_write_config_byte(pci_dev->bus, devfn, 0xe1, hidden); |
1514 |
| - pci_unlock_rescan_remove(); |
1515 | 1491 |
|
1516 | 1492 | res = &tco_res[1];
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| 1493 | + ret = p2sb_bar(pci_dev->bus, 0, res); |
| 1494 | + if (ret) |
| 1495 | + return ERR_PTR(ret); |
| 1496 | + |
1517 | 1497 | if (pci_dev->device == PCI_DEVICE_ID_INTEL_DNV_SMBUS)
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1518 |
| - res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL_DNV; |
| 1498 | + res->start += SBREG_SMBCTRL_DNV; |
1519 | 1499 | else
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1520 |
| - res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL; |
| 1500 | + res->start += SBREG_SMBCTRL; |
1521 | 1501 |
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1522 | 1502 | res->end = res->start + 3;
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1523 |
| - res->flags = IORESOURCE_MEM; |
1524 | 1503 |
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1525 | 1504 | return platform_device_register_resndata(&pci_dev->dev, "iTCO_wdt", -1,
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1526 | 1505 | tco_res, 2, &pldata, sizeof(pldata));
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