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Stephane EranianIngo Molnar
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perf/x86/rapl: Refactor to share the RAPL code between Intel and AMD CPUs
This patch modifies the rapl_model struct to include architecture specific knowledge in this previously Intel specific structure, and in particular it adds the MSR for POWER_UNIT and the rapl_msrs array. No functional changes. Signed-off-by: Stephane Eranian <[email protected]> Signed-off-by: Ingo Molnar <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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arch/x86/events/rapl.c

Lines changed: 23 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -131,7 +131,9 @@ struct rapl_pmus {
131131
};
132132

133133
struct rapl_model {
134+
struct perf_msr *rapl_msrs;
134135
unsigned long events;
136+
unsigned int msr_power_unit;
135137
bool apply_quirk;
136138
};
137139

@@ -141,7 +143,7 @@ static struct rapl_pmus *rapl_pmus;
141143
static cpumask_t rapl_cpu_mask;
142144
static unsigned int rapl_cntr_mask;
143145
static u64 rapl_timer_ms;
144-
static struct perf_msr rapl_msrs[];
146+
static struct perf_msr *rapl_msrs;
145147

146148
static inline struct rapl_pmu *cpu_to_rapl_pmu(unsigned int cpu)
147149
{
@@ -516,7 +518,7 @@ static bool test_msr(int idx, void *data)
516518
return test_bit(idx, (unsigned long *) data);
517519
}
518520

519-
static struct perf_msr rapl_msrs[] = {
521+
static struct perf_msr intel_rapl_msrs[] = {
520522
[PERF_RAPL_PP0] = { MSR_PP0_ENERGY_STATUS, &rapl_events_cores_group, test_msr },
521523
[PERF_RAPL_PKG] = { MSR_PKG_ENERGY_STATUS, &rapl_events_pkg_group, test_msr },
522524
[PERF_RAPL_RAM] = { MSR_DRAM_ENERGY_STATUS, &rapl_events_ram_group, test_msr },
@@ -578,13 +580,13 @@ static int rapl_cpu_online(unsigned int cpu)
578580
return 0;
579581
}
580582

581-
static int rapl_check_hw_unit(bool apply_quirk)
583+
static int rapl_check_hw_unit(struct rapl_model *rm)
582584
{
583585
u64 msr_rapl_power_unit_bits;
584586
int i;
585587

586588
/* protect rdmsrl() to handle virtualization */
587-
if (rdmsrl_safe(MSR_RAPL_POWER_UNIT, &msr_rapl_power_unit_bits))
589+
if (rdmsrl_safe(rm->msr_power_unit, &msr_rapl_power_unit_bits))
588590
return -1;
589591
for (i = 0; i < NR_RAPL_DOMAINS; i++)
590592
rapl_hw_unit[i] = (msr_rapl_power_unit_bits >> 8) & 0x1FULL;
@@ -595,7 +597,7 @@ static int rapl_check_hw_unit(bool apply_quirk)
595597
* "Intel Xeon Processor E5-1600 and E5-2600 v3 Product Families, V2
596598
* of 2. Datasheet, September 2014, Reference Number: 330784-001 "
597599
*/
598-
if (apply_quirk)
600+
if (rm->apply_quirk)
599601
rapl_hw_unit[PERF_RAPL_RAM] = 16;
600602

601603
/*
@@ -676,13 +678,17 @@ static struct rapl_model model_snb = {
676678
BIT(PERF_RAPL_PKG) |
677679
BIT(PERF_RAPL_PP1),
678680
.apply_quirk = false,
681+
.msr_power_unit = MSR_RAPL_POWER_UNIT,
682+
.rapl_msrs = intel_rapl_msrs,
679683
};
680684

681685
static struct rapl_model model_snbep = {
682686
.events = BIT(PERF_RAPL_PP0) |
683687
BIT(PERF_RAPL_PKG) |
684688
BIT(PERF_RAPL_RAM),
685689
.apply_quirk = false,
690+
.msr_power_unit = MSR_RAPL_POWER_UNIT,
691+
.rapl_msrs = intel_rapl_msrs,
686692
};
687693

688694
static struct rapl_model model_hsw = {
@@ -691,19 +697,25 @@ static struct rapl_model model_hsw = {
691697
BIT(PERF_RAPL_RAM) |
692698
BIT(PERF_RAPL_PP1),
693699
.apply_quirk = false,
700+
.msr_power_unit = MSR_RAPL_POWER_UNIT,
701+
.rapl_msrs = intel_rapl_msrs,
694702
};
695703

696704
static struct rapl_model model_hsx = {
697705
.events = BIT(PERF_RAPL_PP0) |
698706
BIT(PERF_RAPL_PKG) |
699707
BIT(PERF_RAPL_RAM),
700708
.apply_quirk = true,
709+
.msr_power_unit = MSR_RAPL_POWER_UNIT,
710+
.rapl_msrs = intel_rapl_msrs,
701711
};
702712

703713
static struct rapl_model model_knl = {
704714
.events = BIT(PERF_RAPL_PKG) |
705715
BIT(PERF_RAPL_RAM),
706716
.apply_quirk = true,
717+
.msr_power_unit = MSR_RAPL_POWER_UNIT,
718+
.rapl_msrs = intel_rapl_msrs,
707719
};
708720

709721
static struct rapl_model model_skl = {
@@ -713,6 +725,8 @@ static struct rapl_model model_skl = {
713725
BIT(PERF_RAPL_PP1) |
714726
BIT(PERF_RAPL_PSYS),
715727
.apply_quirk = false,
728+
.msr_power_unit = MSR_RAPL_POWER_UNIT,
729+
.rapl_msrs = intel_rapl_msrs,
716730
};
717731

718732
static const struct x86_cpu_id rapl_model_match[] __initconst = {
@@ -760,10 +774,13 @@ static int __init rapl_pmu_init(void)
760774
return -ENODEV;
761775

762776
rm = (struct rapl_model *) id->driver_data;
777+
778+
rapl_msrs = rm->rapl_msrs;
779+
763780
rapl_cntr_mask = perf_msr_probe(rapl_msrs, PERF_RAPL_MAX,
764781
false, (void *) &rm->events);
765782

766-
ret = rapl_check_hw_unit(rm->apply_quirk);
783+
ret = rapl_check_hw_unit(rm);
767784
if (ret)
768785
return ret;
769786

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