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larrchjgunthorpe
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RDMA/hns: Refactor process of posting CMDQ
Simplify __hns_roce_cmq_send() then remove the redundant variables. Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Lang Cheng <[email protected]> Signed-off-by: Weihang Li <[email protected]> Signed-off-by: Jason Gunthorpe <[email protected]>
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drivers/infiniband/hw/hns/hns_roce_hw_v2.c

Lines changed: 17 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -1279,59 +1279,51 @@ static int __hns_roce_cmq_send(struct hns_roce_dev *hr_dev,
12791279
{
12801280
struct hns_roce_v2_priv *priv = hr_dev->priv;
12811281
struct hns_roce_v2_cmq_ring *csq = &priv->cmq.csq;
1282-
struct hns_roce_cmq_desc *desc_to_use;
12831282
u32 timeout = 0;
1284-
int handle = 0;
12851283
u16 desc_ret;
12861284
u32 tail;
12871285
int ret;
1286+
int i;
12881287

12891288
spin_lock_bh(&csq->lock);
12901289

12911290
tail = csq->head;
12921291

1293-
while (handle < num) {
1294-
desc_to_use = &csq->desc[csq->head];
1295-
*desc_to_use = desc[handle];
1296-
dev_dbg(hr_dev->dev, "set cmq desc:\n");
1297-
csq->head++;
1292+
for (i = 0; i < num; i++) {
1293+
csq->desc[csq->head++] = desc[i];
12981294
if (csq->head == csq->desc_num)
12991295
csq->head = 0;
1300-
handle++;
13011296
}
13021297

13031298
/* Write to hardware */
13041299
roce_write(hr_dev, ROCEE_TX_CMQ_HEAD_REG, csq->head);
13051300

1306-
/*
1307-
* If the command is sync, wait for the firmware to write back,
1301+
/* If the command is sync, wait for the firmware to write back,
13081302
* if multi descriptors to be sent, use the first one to check
13091303
*/
13101304
if (le16_to_cpu(desc->flag) & HNS_ROCE_CMD_FLAG_NO_INTR) {
13111305
do {
13121306
if (hns_roce_cmq_csq_done(hr_dev))
13131307
break;
13141308
udelay(1);
1315-
timeout++;
1316-
} while (timeout < priv->cmq.tx_timeout);
1309+
} while (++timeout < priv->cmq.tx_timeout);
13171310
}
13181311

13191312
if (hns_roce_cmq_csq_done(hr_dev)) {
1320-
handle = 0;
1321-
ret = 0;
1322-
while (handle < num) {
1323-
/* get the result of hardware write back */
1324-
desc_to_use = &csq->desc[tail];
1325-
desc[handle] = *desc_to_use;
1326-
dev_dbg(hr_dev->dev, "Get cmq desc:\n");
1327-
desc_ret = le16_to_cpu(desc[handle].retval);
1328-
if (unlikely(desc_ret != CMD_EXEC_SUCCESS))
1329-
ret = -EIO;
1330-
1331-
tail++;
1332-
handle++;
1313+
for (ret = 0, i = 0; i < num; i++) {
1314+
/* check the result of hardware write back */
1315+
desc[i] = csq->desc[tail++];
13331316
if (tail == csq->desc_num)
13341317
tail = 0;
1318+
1319+
desc_ret = le16_to_cpu(desc[i].retval);
1320+
if (likely(desc_ret == CMD_EXEC_SUCCESS))
1321+
continue;
1322+
1323+
dev_err_ratelimited(hr_dev->dev,
1324+
"Cmdq IO error, opcode = %x, return = %x\n",
1325+
desc->opcode, desc_ret);
1326+
ret = -EIO;
13351327
}
13361328
} else {
13371329
/* FW/HW reset or incorrect number of desc */

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